Research window: 2026-10-28 06:00 ~ 2026-10-29 06:00 (Beijing time, 24 hours; Thursday morning report, window continues from the previous daily report’s cutoff).

Sources: GitHub (full audit of 61 repos under org: flagos-ai, 99 commit searches, 67 merged PRs and 288 open PRs searched, 100 org event stream entries, atomic verification of Releases/Tags across 31 repos, atomic supplementary verification of 7 repos, review of key PR bodies and artifact sizes), Google News RSS (24 sets of Chinese and English query terms, via proxy), HN Algolia (8 sets), CSDN FlagOS column, BAAI Community, official websites of eight member organizations (see appendix source list for details).

Index for This Issue

  • Today’s Highlights: Horizon BPU connected as an eager operator backend; FlagCX tags v0.14.1 and completes rpm backends for three vendors; Moore Threads open-sources Megatron-MUSA-Titan (10-28)
  • I. Open-Source Project Progress (GitHub Activity)
    • 1.1 Organizational cadence: 23 repos pushed, 99 commits, 67 merged, in-review down to 288 (10-28 ~ 10-29)
    • 1.2 Releases: FlagCX tags v0.14.1, device bitcode now generated per adapter (10-28)
    • 1.3 FlagGems: Kunlunxin scalar-chain fusion delivers 10x speedup, Enflame reference implementation batch fixes in review (10-28)
    • 1.4 FlagGems-sglang: AMD gfx1100 adds Mamba operators, Enflame core_shapes now effective (10-28)
    • 1.5 Compilers: FlagPrism integrates Enflame, Ascend TensorView fetch-store reduced, FlagMega speeds up RDNA decoding (10-28)
    • 1.6 Inference and training stack: Enflame Qwen3.5 FP8 on GCU, fused all-reduce RMSNorm lands in FlagGems-vllm (10-28)
    • 1.7 Build and release: changelog goes live with Harbor, two never-pushed Cambricon images withdrawn (10-28)
    • 1.8 Rules: FEP-0140 moves to Implementable, FEP-0141 narrowed to SGLang 0.5.18 (10-28)
    • 1.9 Other repos: optest integrates Enflame CI, FlagTensor Ascend persistent grid, FlagQuantum set-bit consistency (10-28)
  • II. News Coverage and Ecosystem
    • 2.1 Coverage: Moore Threads open-sources Megatron-MUSA-Titan, only valid hit among 24 queries (10-28)
    • 2.2 Channels and official site: CSDN still stalled at 10-22, no new hits on HN or BAAI Community (10-28)
  • III. Member Units and Backend Vendors In Depth
    • 3.1 Horizon: BPU becomes a per-operator-executable PrivateUse1 backend for the first time (10-28)
    • 3.2 Kunlunxin: Scalar-chain fusion and contiguous-segment kernels, three speedups on P800 (10-28)
    • 3.3 Iluvatar: Convolution uses workload-tier table, conv3d drops channel zero-padding (10-28)
    • 3.4 Enflame: Qwen3.5 FP8 on GCU, core_shapes landed, FlagPrism first integration (10-28)
    • 3.5 DAMO XuanTie: MiniMax sparse attention on PPU, 1.8x geometric mean (10-28)
    • 3.6 Tsingmicro, Xiwang, Hygon: FlagCX rpm packaging completes three backends (10-28)
    • 3.7 Moore Threads: Megatron-MUSA-Titan open-sourced same day as Q3 report (10-28)
  • IV. Summary and Trend Observations
  • Appendix: Source Verification Table and Full Source List

Today’s Highlights: Horizon BPU wired in as an eager operator backend; FlagCX tags v0.14.1 and completes three more rpm backends; Moore Threads open-sources Megatron-MUSA-Titan (10-28)

Date: 2026-10-28　Sources: Torch-FL PR #674 · FlagCX tag v0.14.1 · FlagCX PR #673 · IT之家 report · Megatron-MUSA-Titan repo (full list in appendix)

  • New backend surface: Torch-FL merged Horizon BPU’s per-operator execution layer (#674, 31 files, +5698/−145). Previously BPU registered no compute operators on PrivateUse1 — hbDNNInferV2 only accepts a fully compiled graph, so every aten call fell through to cpu_fallback, and backends_bpu.conf was empty. This change adds the missing intermediate layer: on the x86 side (off-board), hbdk4 compiles a per-operator .hbm artifact library, C++ kernels are generated to submit those artifacts, and a drobotics conf route is added. It covers 40 elementwise operators (32 unary, 8 binary) across 11 shape buckets; on RDK S600, all 440 artifacts matched NumPy with zero differences.
  • Version surface: FlagCX tagged v0.14.1 on 10-28 at 17:25 (commit 7ed4a82, titled “generate device bitcode per adapter, no longer hardcoding NVIDIA”, i.e. #668 merged on 10-18). The tag is a git tag only, with no GitHub Release body; the previous v0.14.0 formal Release dates back to 9-28. The same archive also shows a v0.15.0.dev0 tag (predating this window). In the same window, the 0.14.0-rc2 line received a scatter of patches (#683, under review).
  • Packaging surface: FlagCX’s rpm line expanded from three backends to six (#673, 10 files, +295/−8). The three new ones — libflagcx-tsm (Tsingmicro), libflagcx-sunrise (Sunrise), and libflagcx-du (Hygon DCU) — require no vendor base image: the SDK unpacks to /opt or /usr/local and invokes no package manager, so an openEuler image plus a file repo is a complete build environment; vendor sonames are filtered uniformly per the existing Ascend convention.
  • News surface: On 10-28, Moore Threads announced the open-sourcing of its large-model training infrastructure Megatron-MUSA-Titan, focused on trillion-parameter MoE training on 10,000-card-scale clusters, covering both pretraining and reinforcement learning; it is already in continuous use for pretraining on its 10,000-card cluster, supports blockwise FP8, combines DeepEP with ACE asynchronous communication for expert parallelism and compute overlap, and can work with the slime and miles RL frameworks. The repo MooreThreads/Megatron-MUSA-Titan exists on GitHub, but there were no pushes in this window (last push 10-16) — an “announced open-source, code unchanged” state.
  • Assessment: Each of the three threads advances one layer — plugging a new chip into the eager path (BPU), pushing the communication library’s delivery surface from source tree to tags and distribution packages (FlagCX), and extending the training-stack open-source narrative from FlagOS to member organizations’ own projects (Megatron-MUSA-Titan). The first two are directly relevant to this stack; for the third, watch whether its code flows back as reusable training components for FlagOS.

I. Open-Source Project Progress (GitHub Activity)

1.1 Organization cadence: 23 repos pushed, 99 commits, 67 merged, open reviews fall back to 288 (10-28 ~ 10-29)

Date: 2026-10-28 ~ 2026-10-29　Sources: flagos-ai org repositories · commit search · merged PR search · open PR search

  • Repo side: 23 of 61 repos had pushes in the window, the most in the past two weeks (20 last period). By push recency, from newest to oldest: docs, Trident, FlagQAI, Torch-FL, build-infra, FlagGems, FlagCX, FlagTree, release-info, FlagFFT, FlagGems-sglang, FlagQuantum, optest, FlagDNN, vllm-plugin-FL, FlagTrain, community, FlagGems-vllm, FlagAttention, sglang-plugin-FL, TransformerEngine-FL, FlagTensor, FlagGems-Experimental.
  • Commit side: the commit search returned 99 hits, by repo: FlagQuantum 33, FlagGems-sglang 17, FlagGems 10, build-infra 6, optest 5, FlagGems-vllm 5, Torch-FL 4, FlagTree 4, FlagCX 3, community 3, FlagTensor 3, FlagDNN 2, and 1 each for sglang-plugin-FL, vllm-plugin-FL, FlagTrain, FlagAttention.
  • Merge side: 67 merged PRs, by repo: FlagGems 13, FlagGems-sglang 8, FlagTree 7, build-infra 6, FlagQuantum 6, optest 5, FlagGems-vllm 5, Torch-FL 4, FlagCX 3, community 3, vllm-plugin-FL 2, and 1 each for FlagTrain, FlagAttention, sglang-plugin-FL, TransformerEngine-FL, FlagTensor.
  • Review side: 288 open PRs were updated in the window, 101 newly opened. FlagGems 181 (53 new), FlagTree 21 (9), FlagGems-vllm 20 (9), vllm-plugin-FL 12 (4), FlagCX 8 (2), FlagTrain 7 (2), Torch-FL 6 (5), sglang-plugin-FL 5 (2), Trident 3 (3), flir 3 (1), FlagAttention 3 (1), Megatron-LM-FL 3 (0), FlagGems-sglang 3 (3), TransformerEngine-FL 3 (1), and 1–2 each for the remaining repos.
  • Cadence comparison: versus the previous 24-hour window (20 repos, 102 commits, 98 merges, 401 open, 269 new), pushed repos rose by 3, commits were roughly flat, merges fell 32%, open reviews fell 28%, and new opens fell 62%. Last period’s open-review spike came from a one-off batch of 135 submissions in FlagGems-Experimental; that repo saw no new commits or merges this period, so open reviews returned to the normal range.
  • Releases and events: an atomic check of Releases and Tags across 31 repos found one new tag in the window (FlagCX v0.14.1); build-infra’s latest tag is still v2.2.0 from August 3. The org event stream had 100 entries: 51 pushes, 32 branch creations, 9 branch deletions, 8 PR reviews and review comments, and no PR open/close events — branch activity dominates, consistent with the many temporary fix/suiyuan-* and fix/blocked581-* branches being created and deleted on the FlagGems side.
  • Branch side: the 7 pushed repos not covered by the commit search required atomic follow-up checks. TransformerEngine-FL was confirmed via commits.atom to have one commit in the window (#150, 10-28 16:33); FlagFFT and release-info pushed to non-default branches (FlagFFT’s were codex/musa-shortfall and codex/cuda-2d3d-opt); FlagGems-Experimental’s push came from a dependabot branch; docs, FlagQAI, and Trident all pushed to feature branches, with no new commits on their default branches.

1.2 Releases: FlagCX tags v0.14.1, device bitcode now generated per adapter (10-28)

Date: 2026-10-28　Sources: FlagCX tags · FlagCX v0.14.1 tag · FlagCX PR #668 · FlagCX PR #683 · build-infra PR #1546

  • Tag facts: v0.14.1 was tagged on 10-28 17:25, pointing at commit 7ed4a82, whose title is “generate device bitcode per adapter instead of hardcoding NVIDIA” (#668, merged 10-18). The Releases API returns 404 for this tag, meaning it is only a git tag with no GitHub Release and therefore no release notes body; the previous v0.14.0 formal Release is still dated 9-28, with its body pointing to the FlagOS 2.2 release manifest.
  • Content: #668 replaces the hardcoded bindings/ir/nvidia in the setup.py bitcode step with a per-adapter lookup (BITCODE_MAKEFILES), where each adapter declares its own Makefile and architecture variables. Previously any non-NVIDIA adapter would throw a RuntimeError or silently produce no bitcode, so FlagTree’s iluvatar backend could only copy FlagCX sources and rebuild them itself, unable to consume the bitcode FlagCX was supposed to produce.
  • Supporting work: build-infra now records flagcx wheel releases via a bot (#1546), linking wheel delivery to tags and the packaging line; #683, opened in the same window, back-ports the Kunlunxin cstddef fix to the 0.14.0-rc2 line (open), indicating the 0.14 series is still within its support window.
  • To watch: v0.14.1 has no Release body, inconsistent with v0.14.0’s practice of pointing its body at the release manifest; if the 2.3 cycle ships on v0.14.x, a note should be added so downstream users don’t have to guess content from the tag alone.

1.3 FlagGems: Kunlunxin scalar-chain fusion ~10x faster, Enflame reference-implementation batch fixes open (10-28)

Date: 2026-10-28　Sources: FlagGems PR #7617 · FlagGems PR #7600 · FlagGems PR #7850 · FlagGems PR #7803 · FlagGems PR #7036 · FlagGems PR #7061 · FlagGems PR #7223

  • Fused kernel: the Kunlunxin XPU3 side adds backend specialization for eight out-of-place scalar-chain operators (#7617, 275 lines). Isomorphic float lists go through one fused kernel: small shapes use a single launch with all pointers passed as kernel arguments, large shapes use streaming tiles; outputs come from one allocation plus unbind rather than one allocator call per tensor. Relative time for the eight operators rises from 0.083–0.126 to 0.813–0.934, roughly seven to ten times.
  • Contiguous-segment kernels: the batch-norm inference and QKV transform operators change from “one program per (n,c) slice” to “one program per contiguous BLOCK of elements, recovering the channel or packed row from the flat index” (#7600). Aggregate metrics rise from 0.228 to 1.357 and from 0.260 to 5.062 respectively; the fp32 single-precision cell is still below 0.8, which the author judges by the aggregate metric and states explicitly in the description.
  • Vectorization fix: masked_fill’s integer-view fast path kept the whole kernel scalar because arith.extsi has no vector form (fp16 0.34, fp32 0.50); rewritten as the f32 form x*(1-m)+V*m, it rises from 0.577 to 0.829 on P800, with masked_fill_ and masked_fill_scalar benefiting as well, and 594 test cases passing (#7850).
  • Imports and executor: the Kunlunxin backend fails to import directly on the latest master commit — the _result_dtype helper was removed from the shared executor in #7561 but the backend still references it (#7803, 90 lines); after fixing the import, the shared executor then reported operand #0 does not dominate this use, also fixed in this PR.
  • Operator coverage: KernelGen adds _indices_copy (#7223, 250 lines, verified on H20), but performance is only 0.21x torch — a coverage addition, not a speedup in the near term. lighting_indexer’s reference implementation now accumulates per head, cutting peak memory from about 8.6 GiB and fixing an OOM on 40 GiB cards (#5852).
  • Open side: 53 new PRs this window, mostly lukatao’s Enflame reference-implementation fixes (#7890 through #7908, consecutive), covering Kaiser/inplace ldexp, aminmax, special_round, LU, vander/slogdet, median/stacking/Lanczos, Adagrad, batch-norm ABI, and more; plus a one-line AMD fix (#7908) — AMD’s vendor descriptor sets the device name to cuda without a triton_extra_name, so pow, tanh, exp, rsqrt, erf, gelu, etc. all route to __nv_* and are rejected by the AMD backend.

1.4 FlagGems-sglang: AMD gfx1100 gains Mamba operators, Enflame core_shapes actually takes effect (10-28)

Date: 2026-10-28　Sources: FlagGems-sglang PR #231 · PR #232 · PR #229 · PR #233 · PR #237 · PR #236

  • AMD side: adds gfx1100 versions of causal_conv1d_fn, chunk_state_varlen, and bmm_chunk for the RDNA3 tier (#231, 578 lines), tuned and tested on Radeon PRO W7900D; the three change only launch parameters, with outputs bit-identical to the generic kernels. Time slicing follows the longest sequence rather than a fixed 128 tokens × 4 channels, and dstate above 128 switches to smaller tiles and a 16-token K step.
  • Enflame side: #229 added _enflame/core_shapes.yaml, but no code in the repo loads it — init_user_config() only has a hardcoded kunlunxin branch (root-cause analysis in #232). #232 generalizes shape-file lookup to “derive _<vendor>/core_shapes.yaml from vendor_name, use it if present, otherwise fall back to the shared default,” and also fixes the latent issue where the kunlunxin path was set unconditionally and raised FileNotFound when the file was absent.
  • Test infrastructure: candidate injection is unified between correctness tests and benchmarks (#233, 9 files); standalone benchmark sessions previously did not register --override, and candidate-only mode called a nonexistent registry method; get_override() exposes the actual candidate, and normal timing, preflight, and profiling share one resolver. Also adds per-case dummy-candidate call validation (#237) and a package-level import fix (#236, avoiding sys.modules conflicts).
  • Case listing: the silu benchmark supports listing cases without tensors and replaying them exactly (#234), with --list-cases pagination wrapping up the 238 merged PRs.
  • Assessment: this repo had 17 commits and 8 merges in the window, all about “making vendor shape tables and candidate injection speak the same language across backends” — a convergence of test conventions rather than new operators.

1.5 Compilers: FlagPrism adds Enflame, Ascend TensorView load/store reduced, FlagMega speeds up RDNA decode (10-28)

Date: 2026-10-28　Sources: FlagTree PR #1239 · FlagTree PR #1426 · FlagTree PR #1439 · FlagTree PR #1456 · FlagTree PR #1454 · flir PR #86

  • Profiling and debugging: FlagPrism’s debugger and profiler extend to the Enflame backend (#1239, 5 files, +119/−31). CMake and Python add Enflame to the supported list and enable it by default, keeping an explicit opt-out and mutual exclusion with Proton; at runtime, kernels launched with debugging go through the FlagPrism gateway, with metadata capture handled separately from the hidden control-buffer argument, while normal execution still uses the direct path.
  • IR and load/store: the Ascend backend gains the TensorView access path (#1426, 32 files, +4901 lines, merged into triton_v3.5.x). Kernels build encoded views on the base pointer with three explicit constructors, then load/store whole blocks by index; out-of-bounds lanes are filled with zero/nan/inf/-inf or dropped, and the backend chooses between “indexed-payload DMA” and “element-wise copy with zero padding” based on the index pattern between CommonIR and HIVM.
  • AMD decode: FlagMega optimizes batch-1 decode for Qwen3-1.7B bf16 (#1439, 44 files, merged into feature/flagmega). R9700 (gfx1201) reaches 154 tok/s at context 1, 150 at 1K, 139 at 4K, 125 at 8K; W7900 (gfx1100) reaches 167, 162, 149, 136 tok/s respectively, with measured bandwidth of 530–597 GB/s, 82%–87% of the card’s measured streaming ceiling.
  • Correctness: the AMD backend’s CanonicalizePointers no longer asserts, instead merging fat-pointer attributes of arith.select (#1456); the RLC side no longer re-tags producers whose layout change is illegal or unsafe (#1454).
  • CI and open PRs: FlagGems CI assets move into FlagTree (#1443, #1447); 9 new open PRs, including syncing the Tsingmicro backend to the internal Triton 3.6 dev line (#1459, 27 files, +2264 lines, with a per-launch precision API and CoreIR entry), the rpm line switching to consuming published wheels to build Ascend packages (#1461, the first line needing neither vendor SDK nor hardware), four software-pipelining bug fixes on NVIDIA Hopper (#1460, cp.async with eviction policy leaves undefined address descriptors on ptxas 12.8–13.1), Ascend structured permutation and persistent-loop performance (#1466), P800 SDNN 1-D modulo loads (#1465), and flir’s Ascend split/join and static permutation lowering (#86).

1.6 Inference and training stack: Enflame Qwen3.5 FP8 on GCU, fused all-reduce RMSNorm lands in FlagGems-vllm (10-28)

Date: 2026-10-28　Sources: vllm-plugin-FL PR #358 · PR #525 · FlagGems-vllm PR #773 · PR #1017 · TransformerEngine-FL PR #150

  • Enflame inference: the GCU backend adds Qwen3.5 FP8 support (#358, 20 files, +3367 lines, based on release/0.2). It introduces W8A8 block-scaled FP8 inference and reworks kernel patches around GCU300/GCU400 hardware limits so FP8 MoE models run in both eager and full-graph modes.
  • Communication wiring: the vLLM plugin now takes FlagCX from the installed package (#525, 11 files). The flagcx wheel installs the ctypes facade as flagcx.api and places libflagcx.so in the package’s lib/, so wheel-only environments have no source tree for FLAGCX_PATH to point at; this PR prefers importing flagcx.api and falls back to the FLAGCX_PATH wrapper, updating three call sites (flagcx.py, flagcx_connector.py, sunrise/patch.py).
  • Operators: FlagGems-vllm adds fused all-reduce RMSNorm (#773, 6 files, +3191 lines): all-reduce + residual add + RMSNorm, with optional static quantization (FP8, NVFP4 on SM100+), supporting FP16/BF16 at TP2/TP4/TP8, plus benchmarks against vLLM’s FlashInfer implementation and representative GLM-5.2 shapes. ihc_pre’s stage1 merge replaces tl.atomic_add with per-split-slot writes (#1017) — atomic adds made results depend on block arrival order and were not bit-reproducible on repeated launches; determinism is restored.
  • Dependencies and regressions: TransformerEngine-FL rolls the three 3rdparty/ submodules back to upstream v2.17’s validated baseline (#150): #129 had mistakenly advanced cutlass by 240 commits (4000+ files), cudnn-frontend from v1.25.0 to an unreleased snapshot, and googletest from v1.14.0 to master HEAD.
  • Training side: FlagTrain adds a KMCompiler config for the FlagOS test suite (#37); the seven open PRs remain per-vendor KMCompiler operators (scaled_masked_softmax, fused fused_proj_rms forward/backward, bias_swiglu, fast_gelu, moe_gemm, tanh_soft_clamp).

1.7 Build and release: changelog goes live on site and Harbor, two never-pushed Cambricon images withdrawn (10-28)

Date: 2026-10-28　Sources: build-infra PR #1545 · PR #1547 · PR #1548 · PR #1549 · PR #1542 · PR #1543

  • Changelog goes live: per-image changelogs now appear both at the end of site pages and as Harbor repository descriptions across all three release tiers (#1545, 455 files, +19080 lines). Previously changelogs were written only inside the repo with no consumer, so site pages, in-repo readmes, and Harbor descriptions all lacked this section, and application tiers had not even a description line. Sections are implemented as “recomputed rather than rendered inline with the body”: page bodies each have their own generator and cadence, and inline sections would be overwritten by the last line, losing reasons written in between. Empty pending entries and upstream_prs are not published; the same window first made the reasons bilingual (Chinese/English) (#1542).
  • Withdrawing nonexistent images: Harbor has no megatron_training0.18.2-cambricon-neuware4.7.2 or megatron_rl0.18.2-cambricon-neuware4.7.2 repositories, yet both 0.18.2 status matrices recorded image_tag: 2.2.0-0.3.0 (#1547, 13 files, +29/−496). That tag came from the commit that first created the matrices, not from the recording step, so the docs pipeline published launch pages, readmes, and changelogs for two nonexistent images, and every subsequent pubdoc-app run 404’d on those two repos (the other 107 accepted description PUTs).
  • Root cause of the failed image push: in the 0.18.2 wheel, platform_register has no MLU platform, and after torch_mlu’s gpu_migration aliases the CUDA surface to MLU, PlatformCUDA is selected and the pipeline-parallel group is never initialized; the MLU registration (MLF #125, including #188/#190/#191) landed only on release/0.2, and v0.3.0, 0.3.0-rc2, and main lack the file with no port in flight. The fix was to withdraw the claim rather than force it: remove image_tag from both backends, set launch_docs: false, and delete the two changelogs so that “changelog file set == published set” holds again (151 files in that set; only this block was never delivered).
  • Builder gap filled: the amd-rocm7.2.4 runtime image is based on ubuntu 24.04, and FlagCX wheels built in it link GLIBC_2.38, rejected by the wheel line’s 22.04 gate (22.04-incompatible symbols: GLIBC_2.38, GLIBCXX_3.4.32, __isoc23_). This PR gives that line a self-contained 22.04 builder, bringing the glibc floor back to 2.35: installing the jammy ROCm 7.2.4 packages (rccl/hip-dev plus the hipsolver/hipfft/miopen-hip headers torch needs, and amdgpu-core from the graphics repo), deadsnakes Python 3.12, and a pinned torch 2.11.0+rocm7.2 (#1548, 204 lines).
  • Gate moved earlier: application-tier pages previously had no consistency check — after changing an image_tag or changelog reason, pages and Harbor-facing readmes stayed stale (#1549, 6 files). Now gen_descriptions.py --app-only --check is wired into .githooks/pre-commit and CI, rebuilding images.yaml and diffing whenever the status matrix, application changelogs, application pages, or application readmes are touched.
  • Open: the repackaging line’s dependency resolution now reads the PEP 503 simple index directly (#1543) — the old implementation spawned a pip index versions subprocess per dependency, and the JSON API 404s on the Aliyun mirror, so 0.28/0.32 repackaging took about two hours and needlessly downloaded a 300MB triton wheel.

1.8 Rules: FEP-0140 moves to Implementable, FEP-0141 narrowed to SGLang 0.5.18 (10-28)

Date: 2026-10-28　Sources: community PR #159 · PR #160 · PR #161 · 2.3 schedule

  • FEP-0140: first adds the scope and validation plan for operator profiling (#159), then changes status from draft to Implementable and sets Owner to @ceci3 (Lü Mengsi) (#160, only two metadata fields). The proposal remains subject to release acceptance, and tracking issue #151 stays open.
  • FEP-0141: narrowed to SGLang 0.5.18, the remaining Empty integration, and basic functionality for MetaX/Tsingmicro, with Owner set to @yixiaodapeng (#161, +33/−144). Detailed platform progress stays in #152; executable regression, operator coverage, performance and stability checks, and wheel build commands are retained; the historical version matrix and duplicate deployment notes are removed.
  • Clarifications: DeepSeek-V4-Flash/Pro remain the initial W8A8 candidates; the 10% throughput improvement over NVIDIA is an optimization goal, not a fixed acceptance threshold. These qualifiers are kept explicit to prevent later reading the goal as a gate.
  • Schedule check: the community/release/2.3 directory still contains only the Chinese and English schedule tables, with no release manifest; the 2.2 directory has rc0/rc1/rc2 plus the formal manifest. Per the schedule, 11-13 is the FEP merge deadline and 11-30 pulls rc0.

1.9 Other repos: optest joins Enflame CI, FlagTensor Ascend persistent grid, FlagQuantum set-bit consistency (10-28)

Date: 2026-10-28　Sources: optest PR #14 · optest PR #15 · FlagTensor PR #32 · FlagQuantum PR #945 · FlagQuantum PR #914 · FlagDNN repo

  • optest: five merges. Enflame S60 joins the variant CI for FlagGems-vllm and FlagGems-sglang, while the operator list applies only to FlagGems itself (#14); flagos-gpu-check is reworked into a single text summary or a single parseable JSON/YAML (#15, 19 files, +2947 lines), adding normalized fields such as device, driver, runtime, runtime_version, device_count, and memory_unit, with fixed text labels Device:, Driver:, GPUs Usage:, and runtime described separately from the host driver (#16 then brings accelerator metadata into the test summary).
  • FlagTensor: the Ascend persistent-grid element-wise kernel and vendor-specific tuning are merged (#32, 24 files, +1128/−139), followed by folding the Ascend runtime helpers into flagtensor.runtime (#33, #32 series commits).
  • FlagQuantum: six merges and 33 commits, still first in the org by commit volume. The core is turning “is sharded MPS equivalent to unsharded” into executable evidence (#945): the same program runs two arms — max_bond 64 with exact gradients (layout only) and max_bond 2 with approximate gradients (layout and truncation together) — and the difference between the arms separates the two contributions; also public Module training speedup plus the declared JAX batched VJP (#914), rejection of non-finite bound angles (#944), recovery of two suites broken by pytest 9.2 (#946), a state/gradient consistency grid (#947), and attributing failures to the introducing change (#948).
  • Others: FlagDNN’s two merges are both Hygon fixes (GPU name and performance); FlagAttention merges DAMO XuanTie PPU’s MiniMax sparse attention (#111, 6 files, +4644 lines); FlagCX fixes the AMD adapter’s stream guard (#680) and the Kunlunxin platform traits’ cstddef (#682); FlagQAI’s #1 is still open; docs’ two merges are both bot-generated (ModelScope model lists #545, #567); Trident has three open PRs (Ascend LLVM adaptation #7, user-supplied LLVM_ROOT #6, old/new TVM FFI header layout #8).

II. News Coverage and Ecosystem

2.1 Coverage: Moore Threads open-sources Megatron-MUSA-Titan; only one valid item across 24 query sets (10-28)

Date: 2026-10-28　Sources: IT之家 report · Sina Tech repost · Megatron-MUSA-Titan repository · Google News RSS search

  • Event: On 10-28, Moore Threads announced the open-sourcing of Megatron-MUSA-Titan, a large-model training infrastructure project built on its full-featured GPUs. It targets trillion-parameter MoE training on 10,000-GPU-scale clusters, covering both pre-training and reinforcement learning, and provides training adaptation and system optimization for the MUSA platform.
  • Technical points: It has already been used continuously in trillion-parameter MoE pre-training on 10,000-GPU clusters, with the company claiming high MFU and long-duration stable training; it supports blockwise FP8 training; it combines DeepEP with the ACE asynchronous communication engine to accelerate MoE token dispatch and result merging, overlapping expert parallelism with computation; it can work with the slime and miles reinforcement learning frameworks, using Megatron for training and SGLang to generate samples, linking pre-training and reinforcement learning.
  • Code status: The repository MooreThreads/Megatron-MUSA-Titan exists; its README describes it as infrastructure for pre-training and reinforcement learning of 1T+ parameter models on 10,000-GPU clusters. The last push was on 10-16, with no commits in this window—this is an “announced as open source, code unchanged” case, and the “open source” wording in the press release must be viewed separately from the timeline.
  • Candidate pool: The 24 Chinese and English query sets returned 49 candidates in the window, of which 1 was adopted (the item above). The twelve combined Chinese and English component-name queries (FlagOS, FlagGems, FlagScale, FlagTree, FlagPerf, FlagCX, KernelGen) continued to return zero hits across the board.
  • Excluded items: The dozen-plus Moore Threads Q3 earnings articles (revenue of RMB 1.55 billion, up 1773.9% year on year, quarterly non-GAAP net profit turning positive, planned Hong Kong listing) are financial-report and market content, mentioned only as member-unit background in 3.7; the three BAAI items—first cohort of the “Yuanchuang Plan,” AREX-2, and SoulAgent—are model and community content with no direct relation to the software stack; the twenty-plus Enflame-related items are stock quotes, board resolutions, and ETF articles; the Qingwei “Industrial Investment 28 Plan” anniversary article is unrelated to the open-source stack.

2.2 Channels and official sites: CSDN still stalled at 10-22; no new hits on HN or the BAAI community (10-28)

Date: 2026-10-28　Sources: CSDN FlagOS column · HN Algolia search · BAAI community · Moore Threads news center

  • CSDN: The column page has 51 article links, and the latest verifiable date remains 10-22 (replays of the Open Computing Conference sub-forum and a university roundtable); the three earlier highly relevant articles (GLM-5.3-Flash Day0 adaptation to 9 chips, Qwen3.8-Flash-Next first-day adaptation to 8 chips, LightX2V integration with FlagOS) were all verified page by page to be from late August and are not window content.
  • HN Algolia: Across the four-day window, the eight query sets returned hit counts of FlagOS 5, BAAI 30, and FlagGems 1; after strict matching against title and body keywords, direct hits were 0.
  • BAAI community: The search page and homepage are accessible, with no new FlagOS-related articles; the homepage shows no updates to components of this stack.
  • Member official sites: In the eight-site inspection, Moore Threads had a new item within the window—10-28 “Moore Threads 2026 Q3 Report in One Infographic”—which is an earnings infographic and does not involve software stack changes, so per inclusion criteria it is not a main-text item (background in 3.7); the lists for MetaX, Iluvatar CoreX, Cambricon, Enflame, and Qingwei had no new items from 10-28 to 10-29; the Hygon page is static, and the Horizon fetch failed, so list-visible content was used as the basis.
  • Assessment: For the second consecutive window, the news side has only one substantive item, and that item comes from a member company’s in-house training stack rather than a component of this stack; the main body of this issue remains code and release engineering.

III. Deep Dive into Member Units and Backend Vendors

3.1 Horizon Robotics: BPU Becomes an Operator-by-Operator Executable PrivateUse1 Backend for the First Time (10-28)

Date: 2026-10-28　Source: Torch-FL PR #674 · PR #676 · PR #678 · PR #673

  • Integration approach: The BPU’s unit of execution is the .hbm artifact produced by hbdk4, and hbdk4 can only run on x86; the board can neither compile nor ship artifacts with the repo. The prior conclusion was “by design, eager is not possible.” This change splits it into three layers: build single-operator .hbm libraries off-board, generate C++ kernels that submit these artifacts, and add drobotics conf routing.
  • Coverage and validation: 40 elementwise operators, 11 shape buckets, all 440 artifacts on RDK S600 compared against NumPy with zero difference, and aten calls on flagos tensors indeed land on the BPU. The author also records two negative findings: libhbtl.so is merely a CPU reference implementation (ldd shows only libc/libstdc++/libm, and hbtl::ucp::Add has cpu/wall of 1.00), and dynamic shapes are not executable on HBRT 4.7.5 (the loader declares that axis as stride 0, while task validation requires no less than 64).
  • Three follow-up fixes: #676 adds two dispatcher.h switches for kDrobotics; previously the dispatch log name for BPU builds always printed unknown, and KernelSetOf reported the BPU’s own kernel library as unowned. #678 fixes three copy branches that unconditionally box to CUDA—the default FlagGems-led NVIDIA and DAMO XuanTie PPU wheels intentionally link against the CPU-only pip torch, so the CUDA copy kernel’s DispatchStub is empty and the first call fails with missing kernel for cuda. #673 fixes the mismatch between vendor name and platform id in the build record (hygon/dcu, mthreads/musa, enflame/gcu, nvidia/cuda), which is the root cause of eight unit test failures on the Hygon DCU lane.
  • Under review: #672 unifies the claim granularity of soft-lowp matrix operators (declared by conf key, decoded by family), #677 routes FlagGems calls with keyword arguments to the active backend, #680 redefines device aliases by the vendor held in the build record, and #681 reads the libtorch_cuda probe from the torch prefix rather than the interface target.
  • Assessment: This is the only integration in this window where “a new platform goes from unusable to usable.” The value lies in opening the path rather than in performance—40 elementwise operators are a starting point, while backbone operators such as convolution still rely on the torch.compile whole-graph path.

3.2 Kunlunxin: Scalar-Chain Fusion and Contiguous-Segment Kernels, Three Speedups on P800 (10-28)

Date: 2026-10-28　Source: FlagGems PR #7617 · PR #7600 · PR #7850 · PR #7803 · FlagCX PR #682

  • Scalar chains: The fused kernels for eight out-of-place scalar-chain operators raise relative time from 0.08~0.13 to 0.81~0.93 (#7617). The gain comes mainly from the host side: a single output allocation plus unbind replaces one allocator call per tensor; for small shapes, a single launch passes all pointers as arguments.
  • Contiguous segments: After batch-norm inference and QKV transformation were switched to contiguous-segment kernels, aggregate metrics went from 0.228 to 1.357 and from 0.260 to 5.062 (#7600). The original implementation organized work by (n,c) slices or 2D tiles, with non-contiguous reads and writes; the new implementation has each program cover a contiguous run of elements and derives the channel or packed row from a flat index.
  • Masked fill: masked_fill on P800 improves from 0.577 to 0.829 (#7850) by replacing sign extension of the integer mask with a 0/1 float multiply after sitofp, making the entire kernel vectorizable; in terms of precision, m is exactly 0/1, so results are bit-identical.
  • Maintainability: #7803 fixes the Kunlunxin backend failing to import on current master (the shared executor removed the _result_dtype helper) and fixes a dominance compilation error in the shared executor on uni_sram—without the fix, no Kunlunxin test can start.
  • Communication side: FlagCX’s Kunlunxin platform traits move cstddef outside the __xpu__ guard (#682); previously, when parsed from comm_traits.h, size_t was not yet visible, and host-side compilation of the public device API failed outright.

3.3 Enflame: Convolution Uses a Workload-Tier Table, conv3d Drops Channel Padding (10-28)

Date: 2026-10-28　Source: FlagGems PR #7036 · FlagGems PR #7061

  • conv_transpose2d: The generic implementation’s single default schedule (64,32,32,4) plus one 3x3/stride2 special case is replaced by seven hardware-tuned tiers indexed by data type, kernel size, stride, and output channel count (BLOCK_NHW/CI/CO, num_warps, num_stages), switching between two kernel variants depending on whether the output fits in L2—the direct-sweep variant is faster within L2, while the phase-specialized variant is more stable once the output exceeds L2 (#7036, +1886 lines).
  • conv3d: On the Enflame side, BLOCK_CI is already no less than 16, and FlagTree’s AABS also pulls shrunken tiles back to the 16x16x16 lower bound, so the generic path’s channel padding of weight_c to 16 is pure per-call allocation and copy overhead; removing it yields bit-identical output. In addition, BLOCK_NI_DO_HO_WO gains 32 and 64 small-spatial tiles so that small shapes can also fill the device (#7061).
  • Assessment: Both are long-tail tuning in the same direction—replacing “generic, correct but slow” paths with localized schedules while deleting unprofitable overhead such as padding.

3.4 Enflame: Qwen3.5 FP8 on GCU, core_shapes Wired Up, FlagPrism Integrated for the First Time (10-28)

Date: 2026-10-28　Source: vllm-plugin-FL PR #358 · FlagGems-sglang PR #232 · FlagTree PR #1239 · optest PR #14

  • Inference: The GCU backend adds W8A8 block-scaled inference for Qwen3.5 FP8, and kernel patches are reworked around GCU300/GCU400 constraints so that FP8 MoE works in both eager and whole-graph modes (#358, 20 files).
  • Shape table: Enflame’s core_shapes.yaml had been ineffective for a week—there was no load point anywhere in the repo, and the benchmark only recognized a hardcoded kunlunxin branch (#229 added the file, #232 fixed loading). The fix generalizes lookup to any vendor and also fixes the FileNotFoundError caused by the kunlunxin path being set unconditionally.
  • Toolchain: FlagPrism’s profiler and debugger are extended to Enflame and enabled by default (#1239); debug-enabled kernel launches go through the gateway, and the compiler handling needed for L2 capture stays inside the Enflame backend; optest brings S60 into CI for both FlagGems variants (#14).
  • Under review: the TXDA eager backend upgrade for vLLM 0.28 (#642), Enflame profiler and runner support in TransformerEngine (under review), and a large batch of reference implementation fixes on the FlagGems side (see 1.3).

3.5 DAMO XuanTie: MiniMax Sparse Attention on PPU, Geometric Mean 1.8x (10-28)

Date: 2026-10-28　Source: FlagAttention PR #111 · FlagAttention repo

  • Content: Adds MiniMax sparse attention (MSA) inference operators for the DAMO XuanTie PPU backend, covering index scoring, top-k block selection, and sparse attention itself, with both prefill and decode paths implemented (6 files, +4644 lines).
  • Capabilities: Supports paged KV cache, causal masking, and forced block selection; adapts matrix computation layout and kernel launch for 810E; prefill index scoring is parallelized over KV pages, alleviating insufficient parallelism on the query side; FP8 inputs are converted to BF16 for computation, without using native FP8 matrix multiplication.
  • Performance: Against the SGLang generic Triton implementation as baseline, on 810E prefill passes 21/21 with a geometric mean of 2.299x (minimum 1.965, maximum 5.434), and decode passes 18/18 with a geometric mean of 1.354x (1.289~1.485), for a total of 39/39 and a geometric mean of 1.800x.
  • Assessment: This is the first sparse attention path on PPU, contrasting with the BPU integration in Torch-FL in the same window—one fills in coverage of backbone operators, the other fills in special operators for new model structures.

3.6 Tsingmicro, Enrigin, Hygon: FlagCX rpm Packaging Completes Three Backends (10-28)

Date: 2026-10-28　Source: FlagCX PR #673 · FlagCX PR #681 · FlagTree PR #1459 · FlagDNN repo · FlagAttention PR #117

  • Tsingmicro: libflagcx-tsm enters the rpm line; the SDK consists of two makeself installers extracted to /usr/local/kuiper (#673). On the FlagTree side, #1459 under review syncs the Tsingmicro backend to the internal Triton 3.6 development line (27 files, including per-launch precision APIs, an external CoreIR entry point, and a runtime adapter, and fixes Tx81 code generation and CRT defects in DMA/RDMA/WDMA).
  • Enrigin: libflagcx-sunrise enters the rpm line; the SDK is installed to /usr/local via tangtk --toolkit and pccl. Enrigin previously had a 0.28 adaptation under review on the vllm-plugin-FL side.
  • Hygon: libflagcx-du enters the rpm line; the DTK tarball is extracted to /opt/dtk. Two FlagDNN changes fix Hygon GPU names and performance; FlagAttention’s #117 under review adds a pure-Triton GLA implementation for Hygon BW3000 (gfx936), merging gated cumulative sums and recurrent state scanning into a single pipeline and taking the specialized path only for supported inference workloads.
  • Packaging approach: None of the three requires a vendor base image; an openEuler image plus the file repository is a complete environment. Vendor sonames are filtered uniformly following the existing Ascend practice (these SDKs were never RPMs, so no repository could provide them).

3.7 Moore Threads: Megatron-MUSA-Titan Open-Sourced the Same Day as the Q3 Report (10-28)

Date: 2026-10-28　Source: ITHome report · Megatron-MUSA-Titan repo · Moore Threads newsroom · sglang-plugin-FL PR #158

  • Training stack: Megatron-MUSA-Titan targets trillion-parameter MoE on ten-thousand-GPU clusters, covering pretraining and reinforcement learning; it supports blockwise FP8, DeepEP and ACE asynchronous communication, expert parallelism, and compute overlap, and can work with slime and miles (Megatron training + SGLang sampling). This is a Megatron-family training stack developed in-house by a member unit, sharing the same origin as this stack’s Megatron-LM-FL but on a different branch, with no sign of code flowing back yet (the repo was last pushed on 10-16).
  • Financial context: The Q3 report was released the same day: revenue of RMB 1.55 billion, up 1773.9% year over year, with a non-GAAP profit for the quarter; revenue for the first three quarters was RMB 3.289 billion, with net profit attributable to shareholders of RMB 37.6973 million, and the company is pursuing a secondary listing in Hong Kong. The financials do not change this stack’s technical assessment, but they explain its capacity to invest in the pace of open sourcing.
  • Inference side: sglang-plugin-FL’s #158 under review adds MiniMax-M3 support for MUSA, and #125 is Triton and YAML tuning for Qwen3.6 on S5000; there were no MUSA changes on the FlagGems-sglang side in this window.
  • Assessment: Moore Threads’ activity over the past two weeks centers on “in-house open-source dual stacks for training + inference”; its intersection with this stack remains at the operator and plugin layer (FlagGems, sglang-plugin-FL), not the training framework layer.

IV. Summary and Trend Observations

  • A new path is now open: Horizon BPU has gone from “architecturally unable to support eager execution” to a PrivateUse1 backend capable of per-operator execution (40 elementwise operators, 440 artifacts with zero differences), accompanied by fixes to dispatch log naming and the CUDA copy kernel guard. This is the most structurally significant integration of the period, but it covers only elementwise operators; the mainline still relies on whole-graph compilation.
  • The communication layer has entered the tagging and distribution-package stage: FlagCX tagged v0.14.1 (generating device bitcode per adapter), the rpm line expanded from three backends to six, and wheel releases are now tracked in build-infra. Note that this tag has no Release body, inconsistent with the practice for v0.14.0.
  • Release engineering is catching up: changelog site deployment with Harbor, withdrawal of two Cambricon megatron images that were never pushed, app-page consistency checks added to pre-commit and CI, and a 22.04 builder for AMD 7.2.4. These produce no new capabilities, but they directly determine whether the 2.3 release checklist can be self-verifying.
  • Structural changes in open PRs: open PRs fell from 401 to 288, and newly opened from 269 to 101; the 135-commit batch in FlagGems-Experimental from the previous period was neither merged nor added to. The bulk of open PRs is now FlagGems at 181, of which 53 newly opened are mostly Enflame reference-implementation fixes — indicating that the bottleneck in multi-backend acceptance lies in reference implementations and test criteria, not operator supply.
  • Multiple branches require differentiated counting: FlagGems merges to both master and kernelgen-dev (#7905, #7934); FlagTree merges are split across triton_v3.5.x and feature/flagmega; FlagGems-Experimental’s default branch is infra-ci. Counting by default branch understates actual work, while searching by commits misses repos where operators are backfilled atomically.
  • Three points to watch: first, whether a Release note is added after v0.14.1 and whether it enters the 2.3 checklist; second, whether the BPU path expands from elementwise operators to mainline operators such as convolution; third, whether Megatron-MUSA-Titan code actually starts being pushed after the window, and whether it forms reuse with Megatron-LM-FL.

Source Verification Table

Source Verification Result
GitHub org repositories Full check of 61 repos; 23 pushed within the window (20 in the previous period)
GitHub commit search 99 hits; the search index lags same-day merges, so presented alongside merge counts
GitHub merged PR search 67 PRs across 16 repos
GitHub open PR search 288 (101 newly opened); FlagGems accounts for 181, or 60%
Release / Tag atomic check 31 repos; 1 new tag in the window (FlagCX v0.14.1, no Release body)
org event stream 100 events: 51 pushes, 32 branch creations, 9 branch deletions, 8 PR reviews, no PR open/close events
Version schedule community/release/2.3 still contains only the CN/EN schedule tables; build-infra’s latest tag remains v2.2.0
Google News RSS 24 query sets, 49 candidates, 1 adopted (Megatron-MUSA-Titan)
HN Algolia 8 query sets, 0 direct hits within the four-day window
CSDN FlagOS column Latest verifiable article stops at 10-22; no new posts in the window
BAAI Hub No new posts in the window; no updates related to this stack on the homepage
Member company websites 8 inspected; Moore Threads had one Q3 report infographic on 10-28; Horizon fetch failed; no updates from the rest

Full Source List