Simulator

Simulator Development

Provide customized services based on open-source simulators, including Spike, QEMU, GEM5, and other instruction simulations, as well as board-level and full-system simulations.

Support the operation and debugging of Linux, Android, and RTOS.

Provide verification models compliant with SystemC TLM2 standards to accelerate hardware development.

Simulator Customization

Provide a complete board-level simulation model based on QEMU, complete simulation and virtualization support for CPU, Bus, I/O peripherals.

  • Support for microcontrollers (e.g., OpenHW Core-V MCU family) as well as microprocessor unit (MPU) model implementations (e.g., Zynq UltraScale).
  • Support the implementation of complex multi-core or heterogeneous CPU models, such as ARM and RISC-V architectures.
  • Support component-based splicing and free customization equipment platform.
  • Support KVM-based execution acceleration technology.
  • Support virtual interconnection technology and interfaces with external complex real devices, such as FPGAs.

    • Architecture Customization

    Provide a customized instruction set architecture model implementation based on QEMU, Spike, and GEM5.

  • Support RISC-V, ARM, and other architectures.
  • Support for new instruction set functional models based on QEMU, Spike, including new RISC-V extensions like Zc*, FP16, and custom extensions such as xPulp.
  • Support for a clock precision model based on GEM5
  • Support quick interfacing with GNU/LLVM and other toolchains, as well as various instruction verification frameworks, such as RISC-V ACT.

    • Memory Subsystem Emulation

    Provide memory model customization services,including:

  • Memory function model based on QEMU/Spike.
  • Clock precision model based on GEM5.

    • Toolchain Integration

    Provide a streamlined device model, quick integration with the Studio IDE, and support for program execution and debugging.