Reporting period: September 13, 2026 (Sunday) to September 20, 2026 (Sunday), 7 calendar days total, corresponding to ISO week 38 Sources: 4 issues of this publication’s daily TileLang updates (09-17, 09-18, 09-19, 09-20); no daily reports for 09-14 through 09-16 (this publication began trial issues on 09-17), so that period is supplemented by a GitHub organization-level window scan (28 repositories under the tile-ai organization, 168 hours) and repository commit metadata; see appendix for details

I. Weekly Highlights

  1. Main repo opens a CUDA Tile IR execution backend, one commit touches 134 files and adds ~36k lines (09-18): The new backend lowers TileLang programs to NVIDIA’s CUDA Tile IR, loaded via the cuTile runtime, running in parallel with the existing path that “generates CUDA source and hands it to nvcc”; the change also covers JIT, caching, autotuning, two documentation pages, and a dedicated CI job, making it a route-level change rather than an experimental branch; at the end of the window the PR moved to draft status and has not yet been merged (tilelang #3247).
  2. Block-scaled quantized GEMM promoted to a language-level operator, “silent fallback” path removed (09-17): The main repo adds T.gemm_blockscaled and a dedicated backend selector, making scale factors a first-class input of the operator; backends lacking this capability now fail to compile instead of “silently executing as dense GEMM with scale factors discarded.” The documentation site subsequently added the full signature, behavioral contract, and three instruction-level explicit variants (#3237, docs commit).
  3. ROCm-side GLM-5.3 sparse attention k-pool forms a chain within 24 hours (09-19 ~ 09-20): The same author opened four stacked PRs in a row, covering decode tail maintenance after k-pool compression and cache writes, paged logits, Top-K transform, and fused selection, totaling ~9.8k lines across 40 files, directly bound to the released model’s configuration contract (2048-token budget, 512 pool); together with the KDA decode example and the DeepSeek V3.2 FP8 sparse MLA example, the AMD path is being advanced around “native operators in place for new models” (#3251, #3253, #3254, #3255).
  4. TileOPs performance hat trick: batched matmul switches to shared template, FP8 transpose kernel fills a gap, MoE small routing beats vLLM (09-17 ~ 09-19): On H200, batched matmul using the shared GEMM template achieves up to 1.44x speedup and no longer trails the official library; the transpose gap in FP8 batched matmul is closed with a coalesced-memory-access kernel, speeding up five cases by 2.30x to 4.66x; the MoE indexed small-routing path leads vLLM by 25.85% at the GLM-4.5 4096-token tier and 16.03% at the DeepSeek-V3 tier (#2148, #2153, #2141).
  5. Main repo completes a round of “moving silent errors forward” governance (09-16 ~ 09-20): Atomic vector width is now planned from the destination address, speeding up kernels such as embedding backward by 1.4x to 2.5x; atomic add falls back to scalar on non-contiguous destination addresses, fixing a class of silent miswrites and misaligned crashes; three silent defects in random number generation are split into separate PRs; unsupported GEMM type combinations are intercepted before code generation (#3238, #3219, #3242, #3245).
  6. Ascend maintains high frequency all week and closes with “daily regression all green” (09-15 ~ 09-20): NSA forward and its variable-length version land on the same day (19.62 and 20.34 microseconds on 910B3), while dynamic quantization, RMSNorm fusion, and RoPE complete the operator surface; daily regression case counts go 1919 → 1925 → 1936 → 1936 with zero failures for four consecutive days, and multi-device test sharding is introduced; at the end of the window, an mhc_pre example and a batch of operator documentation refinements are added (#1699, #1700, regression report #1814).
  7. Backend landscape takes on a “distribution” form: Sunrise S2/TANG enters 0.1.14 candidate (09-18): A backend distribution repository under the tile-ai organization targeting the domestic GPGPU Sunrise S2 has been discovered, with its own repo, its own version number (0.1.14+sunrise.1.1.0), and its own CI, forming four types of adaptation organization alongside the Ascend adaptation repo, the Hygon feature branch, and the Moore Threads backport branch (tilelang-sunrise).
  8. Adopter breaks silence: FlashQLA merges three PRs on the same day (09-18): The Tongyi Qianwen side’s TileLang-based gated linear attention implementation closes out three PRs at once — SM120/SM121 backward fused kernel, SM100 KKT solve occupancy, and variable-length tail-block async pipelining; engineering focus shifts from new-architecture adaptation to occupancy and boundary correctness (#34).

II. Core Project Progress

Versions and Releases

  • The main repo’s latest tag remains v0.1.14 (released 09-02), with no new tags in the window; by the end of the period it had gone 18 days without a release. Merge cadence converged while the review queue continued to accumulate—the most notable cadence characteristic of this period.
  • No adaptation repo tags were updated during the window: Ascend TileLang-ascend v0.1.2.000-release (09-09), Moore Threads v0.1.14+musa.1 (09-11), Sunrise candidate branch 0.1.14+sunrise.1.1.0; TileOPs still has no release record, with its external status carried by the docs site and nightly snapshots.

Language Layer: Operator Semantics and API

  • Block-scaled quantized GEMM (#3237, merged 09-17): Adds GemmBlockScaledNode and the language-side T.gemm_blockscaled, with dispatch routed through two implementations: cuda.tcgen05.blockscaled (SM100 line) and cuda.mma.blockscaled (SM120 line); fixes two silent-failure issues—SM100 single-CTA possibly hitting the SM120 instruction path, and unsupported backends silently executing as dense GEMM (PR).
  • Copy width clamping (#3246, opened 09-18): The merged width upper bound for T.copy and T.async_copy is now clamped to the actually achievable vector width, replacing the previous fatal log—”capability constraints” degrade and continue, while “user semantic errors” still fail; the criteria for failure versus degradation are now clearly defined.
  • 256-bit global memory access restricted to SM100 and newer architectures (#3248, merged 09-19): 256-bit load/store is emitted only on SM100 and newer architectures with CUDA 12.9 or above; older architectures fall back to the 128-bit path, with negative tests added for pre-SM100.
  • Atomic add stays scalar on non-contiguous destination addresses (#3219, merged 09-16): Adds a CanVectorizeAtomicTarget pre-check covering three destination address forms: address_of, tl.access_ptr, and tvm_access_ptr; fixes silent corruption where “all lanes write to the same cell” was compiled into a wide atomic add, and crashes from unaligned odd base addresses.
  • Three random number defects split and fixed (#3242 / #3243 / #3244, opened 09-17, not merged): The default random sequence was derived only along the x dimension, causing duplicate sampling for 2D thread blocks; binding to void results; and no error on missing initialization—all three are silent issues that “compile type-wise but fail semantically.”

Model Operators and Examples

  • GLM-5.3 sparse attention k-pool pipeline (#3250 ~ #3255, 09-19 ~ 09-20, not merged): Four stacked PRs totaling roughly 9.8k lines across 40 files, covering five stages: k-pool compression and cache writes, decode tail maintenance, paged logits, Top-K transform, and fused selection; validation is based on exact-head CI (ROCm 7.2 / gfx942, with #3251 reporting 2423 passing and #3255 reporting 2435 passing).
  • KDA decode example (#3249, opened 09-19): A gated linear attention decode-state example with safety gating, including correctness coverage for output and state consistency, multi-step, empty-state indexing, and out-of-order slots.
  • DeepSeek V3.2 FP8 sparse MLA forward example (#3224, merged 09-16): A Hopper-oriented model coverage contribution, merged in the first half of the window (before the daily briefing was founded).

Compiler and Backend Paths

  • Symbolic loop layout injectivity proof restored (#3233, merged 09-18): Fixes a regression between v0.1.12 and mainline—when the T.Parallel iteration space is a static/dynamic mix (e.g., (16, n)), a layout with a padded tail is injective but not bijective, and mainline previously reported “no usable layout found”; the fix constructs an inverse mapping from the pending iteration mapping and proves round-trip equality over the domain (related defect issue #2906).
  • CUDA Tile IR execution backend (#3247, opened 09-18, later moved to draft): Target toolchain is CUDA Tile IR 13.4 bindings, tileiras 13.4, cuTile 1.5; the typed IR, lowering, and pass core live in tilelang/tileir, integrated with JIT, caching, and autotuning; a companion pass configuration option is added to still perform source-language semantic checks before materialization (including paths restored from cache).
  • ROCm CI adds portable example validation (#3165, merged 09-19): The whitelist covers four categories—Seer attention, generic Top-K, sparse MLA forward, and grouped tensor matmul—making the examples themselves regression assets, evidence that the AMD path is entering a convergence phase.
  • Metal line hardening: 32-bit integer atomic add support (#3211, merged 09-19, with contention histogram validation), GEMM buffer region offset fix (#3209, merged 09-14); “runtime-variable GEMM row count” (#3215) was closed unmerged (09-20) after nine days of review.
  • Other fixes: Boolean bitwise negation codegen fix (#3228, 09-16), restoring bind-before-use ordering when merging constraint sets (#3221, 09-14), introducing CPU dialect in CPU tests (#3236, 09-16).

Runtime, Toolchain, and Testing

  • JIT adds uint64 parameter type mapping (#3229, merged 09-17), aligning both the Cython and NVRTC host wrappers.
  • Runtime library loading fix (#3227, merged 09-15): library loading issues under symlink-installed layouts.
  • Profiler splits out timing helpers and adds wall-clock benchmarks (#3234, merged 09-16).
  • Test asset quality improvement (#3252, merged 09-20, +20/-509): removes duplicate codegen smoke tests on both the CPU and LLVM sides and the standalone fast-math test module; fixes the false assertion that “compares fast-math output against itself,” and adds real reference implementations for exp10, log2, log10, cos, sin, and tan.

Performance

  • Atomic vector width planned by destination address (#3238, merged 09-16): Dynamic shapes previously introduced int64 lane offsets that scalarized the entire loop; after the fix, embedding backward N=8192/H=4096/V=129280 dropped from 97.90 µs to 56.01 µs, N=196608/H=256/V=3000000 from 146.87 to 82.70 µs, and sequence auxiliary counting and summation from 18.40 to 12.17 µs, with the regression benchmark example_gqa_bwd_tma_reduce_varlen showing roughly a 27% relative improvement. The affected embedding backward and variable-length attention backward are resident kernels for large-vocabulary inference.
  • Operator library-side performance (BMM / FP8 / MoE) is covered in Section IV.

Review Queue Observations

  • ROCm model operators advance as a stacked chain (#3249 ~ #3255), self-described as “including prior commits until each is merged,” requiring serial review—if any one stalls, the entire chain is held up.
  • The three random number defects (#3242 / #3243 / #3244) and the GEMM type combination interception (#3245) continued to be updated within the window but remain unmerged; the Tile IR backend (#3247) went to draft and is static.
  • The gap between merges and the queue: 16 commits on the main repo default branch during the window, with the latter part dominated by backfill and wrap-up, while substantive increments are concentrated in the review queue.

III. Multi-Backend Adaptation

Ascend

  • Operator surface: NSA forward (#1699) and the variable-length version (#1700) landed on the same day — the golden configuration at 19.62 microseconds, with all 27 tiered tests passing; the variable-length version at 20.34 microseconds on 910B3, with all 21 tests passing; dynamic quantization (#1688, all precision tests passing, average speedup 0.78x, performance still trailing the vendor baseline), RMSNorm dynamic quantization fusion (#1673), RoPE (#1580), CrossEntropy broadcast optimization and a dedicated FP32 path (09-15), causal_conv1d_decode decode split AIV pairs (09-15).
  • Quality and regression: Daily regression case count 1919 → 1925 → 1936 → 1936, passing continuously; comparison operator documentation supplemented with dtype coverage (#1602), benchmark script buffer token lifecycle fix (#1779); multi-device test sharding CI (#1812) newly opened.
  • End of window (09-20 afternoon): New mhc_pre example (#1621); a batch of T.tile operator documentation refinements (sort / topk / transpose / max / min / add / sub / mul / div / select); row-slice GM-to-UB copy stride fix; block_sparse_mqa_attn async read/write timeout fix.
  • Assessment: Ascend is the only backend maintaining a “daily visible” engineering cadence, and has entered a phase of “shifting from capability expansion to quality and maintainability.”

MetaX

  • After MACA async copy GEMM (#156) and test fixes (#157) were merged on 09-17, activity shifted to version and test maintenance, with no new commits in the latter half of the window — the smallest scope among the four.

Hygon

  • Multi-level storage (MLS) address rebasing and async pipeline takeover were formally merged into the main branch (#10, 19 files, +540/-31), and backported to the v0.1.12 release branch (also bringing in a 3D slice scope layout fix); the development branch has additional pipeline management wrap-up commits. The backend code changes are the heaviest among the four.

Moore Threads (MUSA)

  • Pushes during the window landed on the v0.1.12+musa.1 backport branch (MUSA 5.3.0 documentation), while the main branch has been static since 09-11 and has not yet followed the later version line.

Others (Sunrise / tilelang-mlir-ascend)

  • Sunrise (S2 / TANG): Backend distribution repository pushed during the window, candidate branch version 0.1.14+sunrise.1.1.0; S2 is a domestic GPGPU targeting large-model inference, with an example surface isomorphic to the main repository (matrix multiplication, FlashAttention, sparse attention, etc.).
  • tilelang-mlir-ascend: 7 commits during the window — CI switched to Ascend A3 device runner (#176), adaptive LayerNorm kernel (#183), benchmark fix (#184), TileOPs multi-head attention operator integration (#185), operator report and optimized Mamba operator, per-agent model selection (#187 / #188, 09-20).

IV. Ecosystem and Adopters

TileOPs (Operator Library)

  • Scale: 23 merges in the window; three consecutive nightly pipeline snapshots online, with 1,040 benchmark items and 1,118 correctness items recording zero failures continuously since 09-18.
  • Performance: BMM shared template up to 1.44x (no regressions against torch-cublas across the board); FP8 BMM transposed kernel 2.30x to 4.66x (MoE prefill 0.8741 to 0.1874 ms); MoE indexed small routing leads vLLM (GLM-4.5 25.85%, DeepSeek-V3 16.03%, Kimi K2 8.65%); see also earlier-in-window merges including FP8 dense decode (#2132), GQA decode parallelism (#2136), W4A16 dequantization cross-channel sharing (#2139), and GemmTemplate extended to dense coop1/coop2 (#2126).
  • Contracts and structure: Manifest supports composite operators, resources, and nullable outputs (#2147); dispatch decoupled from tuning (#2152); GEMM kernels renamed by service region, GEMV two-band merged (#2156, legacy kernel_map keys changed from silent fallback to construction-time error); paged KV helpers moved out of the grouped query attention module (#2150); SM90 shapes completed (#2151); sparse MLA gather out-of-bounds closed off (#2149); unified Gated DeltaNet operator (#2135) and dense GDN prefill migration (#2144).
  • Metrics governance: Routing expert pricing formula fixed — the 8 rows of bandwidth anomalies reported overnight (readings up to 132.4 TB/s, roughly 27x the H200 physical ceiling) stemmed from “billing against all experts” (#2155); byte audit changed to read-side only (#1996); performance history window migrated to the snapshot branch (#2154). Three landed the same day: make the verdict trustworthy first, then talk speed.
  • Newly opened: Grouped GEMM tail-block tiling with caller-declarable padded row layout (#2157), directly chasing CUTLASS grouped kernels (previously 6.4% behind).
  • FlashQLA (Qwen): Three merges (SM120/SM121 backward fused kernel, SM100 KKT solver occupancy, variable-length tail-block async pipeline), then no pushes in the window; silent for several days prior, a pulse-style review cadence.
  • TileKernels (DeepSeek): No pushes in the window (most recent 04-23); media coverage of a DeepSeek engineer evaluating AI-written kernels (09-16/17) used TileKernels as background (a kernel library written purely in TileLang, covering gating, MoE routing, quantization, transpose, and two connection operator types).
  • TileRT: Static for seven consecutive weeks (most recent 08-13), the longest quiet period in the current list.
  • TileFoundry / DeepStack: Two commits (parser and code cleanup, 09-14/15) and one commit (fixes and examples, 09-15) respectively.

V. Community, Tutorials, and Events

  • Docs site: Main repo docs site bot regenerated (387 files, 09-17); the full signature, behavioral contract, and three instruction-level explicit variants of chunked quantized GEMM entered the public API pages; TileOPs docs site deployed twice (content unchanged), and has followed the unified dispatch and compilation boundary updates (both Chinese and English docs).
  • Community tools: Third-party TileSight profiling docs repo made public (09-17/18), connecting TileLang profiling to TileSight’s cache and pipeline analysis interfaces; performance issues classified into six categories with a requirement to distinguish three conclusion strengths: “model prediction / runtime observation / insufficient evidence”; corresponding arXiv performance model paper (07-24, background outside window).
  • Media: NeoTeo reported a DeepSeek engineer’s public judgment — within 6 to 12 months AI-written kernels could reach or exceed his personal level (09-16/17); Huawei Connect 2026 (09-17) announced the early release of Ascend 960 and the Atlas 960 supernode roadmap, forming the industry backdrop for Ascend adaptation cadence.
  • Academic and community: No new topical hits on arXiv or Hacker News in the window; the most recent topical preprint is the 07-24 performance modeling paper.
  • Release cadence: Main repo v0.1.14 has gone 18 days without update; adaptation repo tags unchanged (see Section II).

VI. Trend Observations

  1. A second execution path emerges on the NVIDIA side: The Tile IR backend runs parallel to the existing CUDA code generation path, and TileLang’s abstraction level is beginning to directly border NVIDIA’s own tile-level abstraction. Once mature, its value proposition will shift partly from “better code generation” to “more complete program expression and cross-backend consistency,” and the ownership of scheduling and layout decisions will become a long-term issue.
  2. “Moving silent errors forward to compile-time failures” becomes project-level discipline, with criteria clearly written: The main repo (atomic vectorization, random numbers, GEMM types, layout proofs) and TileOPs (wrong-key errors, dispatch decoupled from tuning) are isomorphic; the main repo also distinguishes two failure classes — “capability constraints” and “user semantic errors” — the former degrades and continues (copy width clamping), the latter fails compilation.
  3. Backend adaptation is deeply bound to “native operators for new models”: ROCm’s GLM-5.3 k-pool chain and KDA, Ascend’s NSA and DeepSeek-family structures, DeepSeek V3.2 FP8 sparse MLA on the main repo’s Hopper — the speed at which a model’s distinctive operators land on a given backend is becoming a direct measure of that backend’s maturity.
  4. TileOPs is evolving toward an “operator layer with contracts and reproducible comparisons”: Performance, contracts, and metrics governance advance in parallel; nightly snapshots pin reproducible elements — commit hashes, image digests, clocks, and power caps — completely, and the acceptance bar is moving toward production readiness.
  5. Domestic backends diverge in cadence and diversify in form: Ascend maintains daily regression (the only one visible daily), Hygon merges plus closes out, MetaX and Moore Threads shift to maintenance, Sunrise enters as a candidate in “backend distribution” form; the degree to which each can track upstream’s latest capabilities has already opened up gaps.
  6. Risks and gaps: Main repo release stagnation at 18 days coexists with a backlogged review queue (Tile IR moved to draft, GLM-5.3 stacked chain unmerged, a Metal proposal closed after nine days); performance data are all author- or vendor-reported, and this publication has no corresponding hardware and has not independently reproduced them; adopters remain broadly quiet (aside from the FlashQLA pulse).

Appendix: Sources and Verification Notes

  • Sources: Four issues of this publication’s daily TileLang brief (09-17, 09-18, 09-19, 09-20). No briefs from 09-14 to 09-16 (this publication launched 09-17); that period was filled in via GitHub organization-level window verification and commit metadata. The 09-17 first issue was a trial run (executed that evening) and overlaps the 09-18 issue by roughly half a day; the 09-18 issue only provides status notes for the overlapping portion.
  • Supplementary verification (168-hour window, 09-13 16:00 to 09-20 16:00): Full verification of pushes across 28 repositories in the tile-ai organization — 14 repositories had pushes in the window; default-branch commit counts: main repo tilelang 16, TileOPs 23, Ascend adaptation repo 19 (ascendc_pto branch), tilelang-mlir-ascend 7; release status rechecked via the repository releases API, with no new versions in the main repo or any adaptation repo during the window.

Source Verification Table

Source Verification Result
tile-ai organization (28 repos) 14 repositories had pushes in the window
Main repo tilelang 16 commits on default branch; newly opened PRs cover groups including Tile IR, ROCm model operator chains, random numbers, and type interception, most unmerged
TileOPs 23 merges; nightly snapshot benchmarks 1,040 items, correctness 1,118 items, continuous zero failures
tilelang-ascend 19 commits on ascendc_pto branch; daily regression passed fully for four consecutive days; no new tags
tilelang-mlir-ascend 7 commits in the window
MetaX / Hygon / Moore Threads / Sunrise Most recent pushes 09-17 to 09-18; no new commits in the latter half of the window
Adopters (FlashQLA / TileKernels) FlashQLA merged three on 09-18; TileKernels no pushes
TileRT / other org repos TileRT static for seven consecutive weeks; TileFoundry and DeepStack one to two commits each
News and academic channels News search, technical communities, and preprint channels had no new topical items in the window; the only media item is the DeepSeek engineer report
Versions and releases Main repo v0.1.14 (09-02) with no release for 18 days; adaptation repo tags unchanged
  • Verification boundaries: Measured data for Ascend and MetaX come from commit messages and PR body self-reports; this publication has no corresponding hardware and has not independently reproduced them; industry-side developments come from public reporting; nightly benchmark readings are single pipeline records, not cross-sectional evaluations.
  • Suggested next cycle: 2026-09-20 ~ 2026-09-27.