TileLang Daily Intelligence Report (2026-10-19)
Research window: 2026-10-16 07:00 ~ 2026-10-19 07:00 (Beijing time, 72 hours, covering the weekend).
Sources: GitHub (full verification of pushes across 29 repositories in the tile-ai organization; 8 repositories had pushes within the window: TileOPs, TileOPs.github.io, TileOPs-nightly, TileFoundry, tilelang, tilelang-hygon, tilelang-metax, tilelang.github.io; 61 merges within the organization window {TileOPs 44, TileOPs.github.io 5, tilelang 5, tilelang-hygon 3, TileFoundry 2, tilelang-metax 2}, 69 under review {tilelang 51, TileOPs 8, tilelang-ascend 5, tvm 2, TileFoundry 1, tilelang-hygon 1, tilelang-mlir-ascend 1}; per-branch checks of non-default branches {ascendc_pto / dev / snapshots}) + release page and version file verification + adopter repository verification (TileKernels / FlashQLA) + community repository verification (tilelang.github.io, TileOPs.github.io, easy-tilelang, AnacondaRecipes, learn-tilelang, BM1690 pipelines) + nightly pipeline verification + Google News multi-query in Chinese and English (via proxy) + Hacker News + arXiv.
This Issue’s Index
- Today’s Focus: TileOPs lands 20 PRs in a single day, pushing eight operators to implemented; three Ascend PRs and Hygon block-scaling close out — PTO vectorization framework enters review (10-16)
- I. Core Project Progress
- 1.1 Main repo: pure TMA producer brought under forward barrier, fixing warp-specialization deadlock (#3503) (10-16)
- 1.2 Main repo: sibling pipeline shared buffer unrolled only once, fixing LayoutInference crash (#2342) (10-16)
- 1.3 Main repo in review: three Profiler fixes and eager frontend source location (#3559 / #3560 / #3561 / #3558) (10-18)
- II. Multi-Backend Adaptation (Ascend / MetaX / Hygon / Moore Threads)
- 2.1 Ascend: SS buffer, RNG state reset, and SimdVF reduction merged (#3514 / #3331 / #3437) (10-16)
- 2.2 Ascend: T.Parallel vectorization to PTO VMI framework in review, 44 files, nearly 20k lines (#3512) (10-18)
- 2.3 Hygon: three scale copy PRs for block-scaling GEMM — K-major packing, FP32 MLS, pipelining (#22 / #23 / #24) (10-17)
- 2.4 MetaX and Moore Threads: metax dev branch syncs with mainline and fixes xfail; no pushes in musa window (10-16)
- III. Ecosystem and Adopters (TileOPs / TileFoundry / Operator Libraries)
- 3.1 TileOPs: two attention-side PRs promoted — MLAVarlen to implemented, DSAPaged landed (#2629 / #2633) (10-18)
- 3.2 TileOPs: CausalConv1d dual operators, Hadamard transform, and SM90 W4A8 GEMM completed (#2627 / #2624 / #2590) (10-18)
- 3.3 TileOPs: per-point performance close-out across four linear attention families (GLA / GDN / KDA / DeltaNet) (10-18)
- 3.4 TileOPs: Softmax split across 16-CTA clusters and GLA decode state slicing (#2632 / #2631) (10-18)
- 3.5 TileFoundry: storage plan and launch plan separated, schedule milestone corrected (#243 / #241) (10-18)
- 3.6 Adopters and nightly pipelines: no pushes from TileKernels / FlashQLA; nightly snapshots recover to 4 (10-19)
- IV. Community, Tutorials, and Events
- 4.1 Docs: Chinese trace guide aligned, eight new operators added to API page (#76) (10-18)
- 4.2 Version line: TileOPs still pins TileLang 0.1.12, PR to upgrade to 0.1.15 closed unmerged (#2554) (10-18)
- 4.3 Media and academia: zero additions in Google News / Hacker News / arXiv window (10-18)
- V. Trend Observations
- 5.1 Shift from “operator completion” to “per-point performance close-out”
- 5.2 Attention pipeline aligned with DeepSeek-V3.2 production format
- 5.3 Ascend moves from “runs” to “automatic vectorization of scalar parallelism”
- 5.4 Compiler enters correctness-hardening phase
- Appendix: Sources and Verification Notes
- Full Source List
Today’s Focus: TileOPs lands 20 PRs in a single day, pushing eight operators to implemented; three Ascend PRs and Hygon block-scaling close out — PTO vectorization framework enters review (10-16)
Over the three-day weekend, the center of gravity shifted from the main repo to the operator library: TileOPs merged 20 PRs on 10-18 alone, 44 cumulative in the window, directly pushing 8 operators that previously had only specs into implemented status, covering MLA varlen prefill, DSA paged decode, causal convolution, Hadamard transform, W4A8 GEMM, paged KV gather, and attention state merge. The main tilelang repo merged 5 PRs in the same window: two are correctness fixes for CUDA warp-specialization and pipeline layout, three belong to Ascend; the Hygon repo completed block-scaling GEMM scale copy from packing to native to pipelining. More noteworthy is the review queue: the Ascend PTO vectorization framework #3512 compiles T.Parallel to PTO VMI with 44 files and nearly 20k added lines, targeting Ascend 950; of the 51 PRs in review in the main repo, 27 are tagged BugFix, indicating the project is in a correctness-hardening phase after the operator rollout.
I. Core Project Progress
1.1 Main repo: Pure TMA producers now arrive at the forward barrier, fixing warp-specialization deadlock (#3503)
Under the pure TMA producer configuration, ProducerConsumerWSRewriter makes the producer loop run across all producer warps, but previously only the selected thread reached the forward (full) barrier; producer warps 1 through 3 only waited on the backpressure (empty) barrier, falling out of sync with consumers, potentially lagging by two phases and hanging the entire block on a reused parity. The change makes every producer thread arrive at the forward barrier (arrive_count set to producer_extent), consistent with the existing behavior for SIMT and cp.async producers, fixing #3470.
Source: tile-ai/tilelang#3503 (10-16)
1.2 Main repo: Shared buffer in sibling pipelines expanded only once, fixing LayoutInference crash (#2342)
When two adjacent T.Pipelined loops share an alloc_shared buffer but have different num_stages (e.g., 2 and 4), the first pipeline expands the buffer from (64,32) to (2,64,32), and the second pipeline’s collection phase treats the already-expanded buffer as the original allocation and inserts another dimension, yielding a four-dimensional (4,2,64,32), causing LayoutInference’s ICHECK to fail outright. The change identifies buffers by original allocation and expands only once, replacing the earlier #2337 and fixing #2309, with 349 lines added and 6 removed.
Source: tile-ai/tilelang#2342 (10-16)
1.3 Main repo under review: Triple Profiler fixes and eager frontend source location (#3559 / #3560 / #3561 / #3558)
Three Profiler fixes targeting benchmark errors and cross-device issues: #3559 fixes empty CUDA Graph capture on a different device (reusing the capture stream cached from the previous GPU, so replay does not execute and the regression count is 9 instead of 27); #3560 snapshots output before subsequent calls overwrite it; #3561 excludes cache-flush time from the early-stopping criterion, preventing a slow candidate tried first from changing the final winner. Additionally, #3558 maps the eager rewriter’s template line numbers back to the first line of the user statement, fixing traceback and coverage misalignment.
Source: tile-ai/tilelang#3559, #3561, #3558 (10-18)
II. Multi-Backend Adaptation (Ascend / MetaX / Hygon / Moore Threads)
2.1 Ascend: Three Merges — SS Buffer, RNG State Reset, and SimdVF Reduction (#3514 / #3331 / #3437)
#3514 adds T.alloc_ss: scalar storage shared on dav-3510 between one AIC and its two AIVs, where each AIV can publish its own uint32 word and the AIC reads it through a packed uint64 view; the 3 KiB SS pool per group, 32-byte-aligned base addresses, version counting, and synchronization all go through the standard buffer pipeline. #3331 resets the RNG state in AddFunction, preventing a leftover __asc_rng_state from a sibling kernel from causing bisheng to report an undeclared identifier. #3437 makes dim=1 reductions inside SimdVF store only lane 0.
Sources: tile-ai/tilelang#3514, #3331, #3437 (10-16)
2.2 Ascend: T.Parallel Vectorization to the PTO VMI Framework Under Review — 44 Files, Nearly 20,000 Lines (#3512)
This PR lets users write scalar parallel T.Parallel (element-wise, control flow, reduction) inside T.SimdVF(lanes=L), which the compiler vectorizes into PTO VMI instructions and then compiles via PTOAS to run on Ascend 950. In terms of division of labor, the TileLang side handles logical lane layout, the vectorization pass pipeline, VMI instruction generation, and Fragment logical mapping, while the toolchain side handles physical register splitting, mask materialization, and vector register allocation. The change touches 44 files, adds 18,988 lines, and deletes 67 lines — a key step for the PTO line moving from execution routing toward automatic vectorization.
Source: tile-ai/tilelang#3512 (10-18)
2.3 Hygon: Three Scale-Copy Changes for Block-Scaled GEMM — K-major Packing, FP32 MLS, Pipelining (#22 / #23 / #24)
#22/#23 support packed scale copy for K-major LDS and native FP32 MLS GEMM on gfx946 (kPack=2), while also adding block-scaling, TF32, and FP32 regression tests; #24 further supports pipelined scale copy in block-scaled GEMM, adding 357 lines, deleting 47 lines, across 5 files. All three merged between 10-16 and 10-17, advancing the Hygon line’s block-scaled GEMM from “it computes” to alignment with the main repo’s pipeline.
Sources: tile-ai/tilelang-hygon#22, #24 (10-17)
2.4 MetaX and Moore Threads: metax dev Line Syncs with Mainline and Fixes xfail; No Pushes in the musa Window (10-16)
tilelang-metax’s default branch is dev, with two merges in the window: #160 fixes xfail cases for MetaXGPU (including test_cuda_fma_fmul.py and others), and #161 merges main into dev, a routine sync following the main repo baseline. tilelang-musa’s default branch main had zero commits in the window, with the latest still being the 09-30 “Prepare public TileLang MUSA 0.1.15”. tilelang-mlir-ascend’s latest commit stops at 10-15, with no pushes in the window.
Source: tile-ai/tilelang-metax (10-16)
III. Ecosystem and Adopters (TileOPs / TileFoundry / Operator Libraries)
3.1 TileOPs: Two attention-side promotions — MLAVarlen moves to implemented, DSAPaged lands (#2629 / #2633)
#2629 changes the MLAVarlenFwdOp status to implemented. The packed-varlen MLA prefill kernel had already been merged; this PR fills in the manifest requirements and has MLAVarlenCall build calls for three configurations — DeepSeek-V3 8×4K, DeepSeek-V3 mixed 512–16K, and Kimi K2 4×8K — with BF16 and FP16 dual-precision registered benchmarks, against FA3’s flash_attn_varlen_func and FlashInfer’s BatchPrefillWithRaggedKVCacheWrapper. #2633 adds DSAPagedFwdOp, performing chunked decoding of the paged FP8 latent cache on FlashMLA’s DeepSeek-V3.2 656-byte row format, returning o and lse; the SM90 kernel rotates two 64-slot key-block buffers across three warp groups, and at 128 heads the two 64-head segments cooperate via a 2-CTA cluster.
Source: tile-ai/TileOPs#2629, #2633 (10-18)
3.2 TileOPs: CausalConv1d dual operators, Hadamard transform, and SM90 W4A8 GEMM completed (#2627 / #2624 / #2590)
#2627 adds CausalConv1dFwdOp and CausalConv1dUpdateFwdOp, with width 2 to 4, optional bias and SiLU, and FP32 accumulation; prefill uses packed sequences (cu_seqlens and optional has_initial_state), decoding advances one step per sequence, and the state shape [B, D, W-1] aligns with vLLM’s causal_conv1d_update. #2624’s HadamardTransformFwdOp supports base_order 1/12/20/28/40, n up to 2^28, and fp16/bf16 with FP32 accumulation, completing four butterfly levels with a single 16-bit MMA pair. #2590’s GemmW4A8FwdOp on SM90 performs FP8 e4m3 activations times group-scaled INT4 weights with BF16 output; the decode kernel serves M≤32, and larger M goes through a warp-specialized prefill kernel.
Source: tile-ai/TileOPs#2627, #2624, #2590 (10-18)
3.3 TileOPs: Point-by-point performance closeout across four linear attention families (GLA / GDN / KDA / DeltaNet) (10-18)
Within the window, the vast majority of merged TileOPs PRs are tagged [Perf], concentrated on the four linear attention lines. GLA: the prefill state chain drops one matrix multiply (#2626), decode state is sliced by value with one block per slice (#2631), and SM89 BF16 gate-gradient reduction is unrolled (#2618) along with partial unrolling of the key reduction (#2617). GDN: prefill partitions only when the walk leaves idle SMs (#2628), and prefill stays bounded under strong gate decay (#2594). KDA: chunk scan is split into a state walk and block-parallel output (#2623), and the state tail condition becomes a boolean test (#2630). DeltaNet: the backward state gradient does only one matrix multiply per block (#2625).
Source: tile-ai/TileOPs#2626, #2631, #2628, #2623 (10-18)
3.4 TileOPs: Softmax split across a 16-CTA cluster and GLA decode state slicing (#2632 / #2631)
#2632 adds SoftmaxClusterSplitKernel for few-row, long-row cases like lm-head (4×102400, FP16/BF16): the old implementation exchanged (max, sum) through global memory across 58 segments per row and a cross-grid barrier, while the new one spreads a row across the registers of a 16-CTA cluster, takes each element’s exponential only once, folds max-first via a shuffle tree across warps, CTAs, and the cluster, and has each CTA send just one pair of values to its peer’s shared memory. #2631 changes GLA decode from one block per head to one value slice per block, reading state only once, with the key-axis reduction first computing local sums using 16-byte vectors and then doing a single batched exchange.
Source: tile-ai/TileOPs#2632, #2631 (10-18)
3.5 TileFoundry: Storage plan and issue plan separated, schedule milestone revision (#243 / #241) (10-18)
#243 keeps raw allocation decisions in the analysis layer, removes executable alias publication and MemoryMetadata.alias, and splits out read-only StoragePlan / IssuePlan, TirBuilder, naming, and a single LoweringContext; access results are memoized and forwarding reuses their values, and it fixes shared-memory placement that still reserved by logical bytes under sparse physical layouts — 39 files, 2543 lines added, 1889 deleted. #241 is a 314-file milestone revision (53049 lines added, 69314 deleted) covering M1 through M8: fixing Reshard traffic and aliases, storage instance comparison, canonical layouts and local projections, window binding and lexical scope validation, and migrating two Qwen examples and regenerating 31 full long groups and all 64 short TIR files.
Source: tile-ai/TileFoundry#243, #241 (10-18)
3.6 Adopters and nightly pipeline: no pushes to TileKernels / FlashQLA; nightly snapshots back to 4 (10-19)
deepseek-ai/TileKernels’ latest commit remains the 10-14 v2.1.0-release merge, and QwenLM/FlashQLA remains at 10-14’s fix-sm120; neither had pushes within the window. TileOPs-nightly’s snapshots branch produced 4 snapshots in the window: 10-16 11:35, 10-17 04:13, 10-18 06:02, and 10-19 05:41, all in the form “bench:
Source: TileOPs-nightly snapshots (10-19)
IV. Community, Tutorials, and Events
4.1 Documentation: Chinese trace guide aligned, eight new operators added to API pages (#76)
Five merges landed in the TileOPs.github.io window. Among them, #76 aligns the Chinese trace guide with the English page, following the trace.run changes in TileOPs #2619 (slots are now often split out of the traced build, decoded only when tracing is enabled, and written to HTML), and adds the eight operators already implemented in the main repo to their corresponding family pages: GemmW4A8FwdOp, HadamardTransformFwdOp, MergeAttentionStatesFwdOp, PagedKVCacheGatherFwdOp, MLAVarlenFwdOp, DSAPagedFwdOp, CausalConv1dFwdOp, and CausalConv1dUpdateFwdOp. The Transform page also drops the “not yet implemented” annotation. tilelang.github.io has one additional documentation update auto-generated by GitHub Actions.
Source: tile-ai/TileOPs.github.io#76 (10-18)
4.2 Version line: TileOPs still pins TileLang 0.1.12; PR to upgrade to 0.1.15 closed unmerged (#2554)
The latest main-repo release is still v0.1.15 from 09-30, while TileOPs’ pyproject.toml still hardcodes tilelang==0.1.12. #2554, which attempted the upgrade to 0.1.15, has been closed without merging. The PR’s self-described blocker is that 29 smoke tests passing on 0.1.12 fail on 0.1.15: 28 stem from T.Pipelined with dynamic extents leaving ptx_wait_group(3 - t * 2) at the cp.async epilogue, with CUDA codegen reporting a Downcast failure (related to main-repo #2859 closing the explicit_unroll default), and 1 is a null-check failure in LegalizeSafeMemoryAccess under a branch folded to False. The PR also planned to add a FIXME(staged-rollout) workaround on the TileOPs side and then rebuild the runner image.
Source: tile-ai/TileOPs#2554 (10-18)
4.3 Media and academia: zero new items in the Google News / Hacker News / arXiv window (10-18)
Across 13 Google News queries in Chinese and English (TileLang, tilelang operators, tile-ai, TileOPs, TileFoundry, TileKernels, tilelang Ascend, tilelang domestic chips, etc.), there were no hits in the window; the most recent item remains the 10-02 series on DeepSeek’s open-source Ascend component releases. The Hacker News tilelang query returned zero hits. arXiv searches for TileLang and tile-level returned no new papers in the window; the most recent related entry is TileSight from 07-24.
Source: Google News TileLang search (10-18)
V. Trend Observations
5.1 Shifting from “operator coverage” to “point-by-point performance closure”
Of the 44 TileOPs merges in the window, the vast majority are tagged [Perf], and nearly every one names its comparison baseline: torch-compile, quack, FA3, FlashInfer, along with specific shapes (serving-b1-h8, serving-b1-h16, lm-head 4×102400, RMSNorm rows from 8192 to 16384). This indicates that once operator coverage was broadened, the focus shifted to closing sub-percentage-point gaps one by one on real serving shapes, rather than continuing to pile on operator count.
5.2 Attention pipeline aligned with DeepSeek-V3.2 production format
DSAPagedFwdOp directly implements 656-byte row-format FP8 latent-cache paged decoding; MLAVarlenFwdOp registers benchmarks per the real configurations of DeepSeek-V3 and Kimi K2; PagedKVCacheGatherFwdOp and MergeAttentionStatesFwdOp complete KV gathering and state merging. This pipeline, together with the four linear-attention families, now covers the full inference path from long-context prefill to decode, using vLLM and FlashMLA storage layouts as the reference.
5.3 Ascend moving from “it runs” to “automatic vectorization of scalar-parallel code”
Last issue’s main thread was the merge of PTO execution routing; this issue’s #3512 compiles T.Parallel directly to PTO VMI, explicitly targeting Ascend 950 and dividing responsibilities with PTOAS for physical registers and mask materialization. Three small fixes in the same period (SS buffer, RNG state, SimdVF reduction) all patch storage and synchronization semantics on dav-3510. This line is shifting from “getting kernels to run” to “letting users write scalar-style code while the compiler handles vectorization.”
5.4 Compiler enters a correctness-hardening phase
Of the 69 PRs under review in the main repo, 51 are tilelang, of which 27 are tagged [BugFix], concentrated in ThreadSync (address-write determination, predicate ordering), Transform (vectorization-domain normalization, cross-thread WAW, pipelined transitive dependencies), and codegen (cp_async wait depth, ROCm FP4 constants, Metal hoisting). These issues mostly surface only under specific combinations—classic edge conditions fed back after large-scale use; TileFoundry’s #243, which splits out a read-only plan object, is structural governance in the same direction.
Appendix: Sources and Verification Notes
- This window is the Monday three-day window, covering 10-16 07:00 to 10-19 07:00, with no overlap with the previous issue (10-15 07:00 to 10-16 07:00).
- The organization-level repository list was fully retrieved via the GitHub API; of the 29 repositories, 8 had pushes within the window; commits on the main branches of the various repositories were checked one by one via the Atom feed, and non-default branches (dev of tilelang-metax, snapshots of TileOPs-nightly, ascendc_pto of tilelang-ascend) were verified separately.
- The merged and under-review counts were taken from ground-truth searches via the GitHub search API (one each for is:merged and is:open), rather than accumulating per-repository pulls lists, to avoid double counting.
- The latest commit on the default branch ascendc_pto of tilelang-ascend is dated 10-14, with no merges to the main branch within the window; its 5 under-review PRs were updated on 10-16, which are continuations of existing reviews and were not counted as new in this issue.
- tile-ai/tvm is a fork of apache/tvm (branch tilelang_main); 2 under-review PRs were updated within the window, and the latest push was 10-07. It has no direct delivery relationship with the TileLang mainline, so it is recorded only and not elaborated.
- The zero new items on the news side were verified with a bare query to confirm the proxy path is working (the same query can return 37 historical results), confirming that there were no new reports within the window rather than a collection failure.
Complete Source List
- [1] tile-ai/tilelang PR #3503 Pure TMA producers incorporated into forward barriers — https://github.com/tile-ai/tilelang/pull/3503
- [2] tile-ai/tilelang PR #2342 Sibling pipelines sharing a buffer are expanded only once — https://github.com/tile-ai/tilelang/pull/2342
- [3] tile-ai/tilelang PR #3559 Cross-device CUDA Graph capture is empty — https://github.com/tile-ai/tilelang/pull/3559
- [4] tile-ai/tilelang PR #3561 Early-stop criterion excludes cache-flush — https://github.com/tile-ai/tilelang/pull/3561
- [5] tile-ai/tilelang PR #3558 eager frontend source locations — https://github.com/tile-ai/tilelang/pull/3558
- [6] tile-ai/tilelang PR #3514 Ascend SS buffer — https://github.com/tile-ai/tilelang/pull/3514
- [7] tile-ai/tilelang PR #3331 Ascend RNG state reset — https://github.com/tile-ai/tilelang/pull/3331
- [8] tile-ai/tilelang PR #3437 SimdVF dim=1 reduction stores only lane 0 — https://github.com/tile-ai/tilelang/pull/3437
- [9] tile-ai/tilelang PR #3512 T.Parallel vectorization to PTO VMI — https://github.com/tile-ai/tilelang/pull/3512
- [10] tile-ai/tilelang-hygon PR #22 K-major packed scale copy and FP32 MLS GEMM — https://github.com/tile-ai/tilelang-hygon/pull/22
- [11] tile-ai/tilelang-hygon PR #24 Block-scaled GEMM pipelined scale copy — https://github.com/tile-ai/tilelang-hygon/pull/24
- [12] tile-ai/tilelang-metax dev branch commits — https://github.com/tile-ai/tilelang-metax/commits/dev
- [13] tile-ai/TileOPs PR #2629 MLAVarlenFwdOp converted to implemented — https://github.com/tile-ai/TileOPs/pull/2629
- [14] tile-ai/TileOPs PR #2633 DSAPagedFwdOp — https://github.com/tile-ai/TileOPs/pull/2633
- [15] tile-ai/TileOPs PR #2627 CausalConv1d dual operators — https://github.com/tile-ai/TileOPs/pull/2627
- [16] tile-ai/TileOPs PR #2624 HadamardTransformFwdOp — https://github.com/tile-ai/TileOPs/pull/2624
- [17] tile-ai/TileOPs PR #2590 SM90 W4A8 GEMM — https://github.com/tile-ai/TileOPs/pull/2590
- [18] tile-ai/TileOPs PR #2626 GLA prefill state chain removes matrix multiplication — https://github.com/tile-ai/TileOPs/pull/2626
- [19] tile-ai/TileOPs PR #2631 GLA decode state slicing — https://github.com/tile-ai/TileOPs/pull/2631
- [20] tile-ai/TileOPs PR #2628 GDN prefill partitioned by SM idleness — https://github.com/tile-ai/TileOPs/pull/2628
- [21] tile-ai/TileOPs PR #2623 KDA chunk scan splitting — https://github.com/tile-ai/TileOPs/pull/2623
- [22] tile-ai/TileOPs PR #2632 Softmax split across a 16-CTA cluster — https://github.com/tile-ai/TileOPs/pull/2632
- [23] tile-ai/TileFoundry PR #243 Separation of storage plan and launch plan — https://github.com/tile-ai/TileFoundry/pull/243
- [24] tile-ai/TileFoundry PR #241 schedule milestone fix — https://github.com/tile-ai/TileFoundry/pull/241
- [25] tile-ai/TileOPs-nightly snapshots branch — https://github.com/tile-ai/TileOPs-nightly/commits/snapshots
- [26] tile-ai/TileOPs.github.io PR #76 Chinese trace guide and eight-operator documentation — https://github.com/tile-ai/TileOPs.github.io/pull/76
- [27] tile-ai/TileOPs PR #2554 TileLang 0.1.15 upgrade closed — https://github.com/tile-ai/TileOPs/pull/2554
- [28] Google News TileLang search — https://news.google.com/search?q=TileLang