Research window: 2026-10-26 04:30 ~ 2026-10-27 04:30 (Beijing time, past 24 hours), contiguous with the previous issue (cutoff at 10-26 04:30).

Sources: Full-repository review of GitHub organizations (RuyiAI-Stack, ruyisdk, openRuyi-Project, buddy-compiler, checking commits, PRs, and Releases within the window repo by repo; upstream forks filtered by keywords such as RISC-V / RVV / XuanTie, with irrelevant upstream commits excluded), openRuyi commit classification and merged PR statistics, ruyi package manager Releases, RuyiSDK developer community forum (biweekly progress and support matrix), ruyiai-daily daily intelligence archive, three-page snapshot of the official RuyiAI homepage, IREE upstream, arXiv search, Google News RSS targeted queries in Chinese and English (via proxy).

This Issue’s Index

  • Today’s Focus: buddy-mlir lands seven commits in one night to push VIR to RVV scalable vectors; biweekly report issue 079 finalized (10-26)
  • I. RuyiAI Stack Progress (PyTorch / Triton / TileLang RISC-V porting)
    • 1.1 llvm-project: riscv branch rebased for the fourth time in six days, baseline advanced by 221 commits (10-26)
    • 1.2 llvm-project upstream: 17 RISC-V passes migrated to NewPM within an hour (10-26)
    • 1.3 llvm-project upstream, remainder: VXRM speculative-write convergence, Zibi equality exit, GlobalISel saturating conversion (10-26)
    • 1.4 pytorch: riscv branch sees zero commits for five consecutive days, seven open PRs with no updates (10-26 status)
    • 1.5 tilelang-riscv and triton-riscv: main branches silent, nightly builds rebuilt at the same commit (10-26)
  • II. RuyiSDK Toolchain and Distributions
    • 2.1 Biweekly progress issue 079 finalized: package manager 0.54.0 moved to end of October (10-26)
    • 2.2 openRuyi: 80 commits, 12 PRs merged, security fixes account for nearly 40% (10-26)
    • 2.3 openRuyi: Go backports SHA-2 Zvk vector cryptography optimization (10-26)
    • 2.4 packages-index and ruyi-imager: image version bumps, installer interaction fixes (10-26)
  • III. Vector Extensions, Architecture Testing, and Operator Optimization
    • 3.1 Support matrix adds Milk-V Jupiter2 Bianbu 4.0.1 test report (10-26)
    • 3.2 Vector repos and FBGEMM all silent, IREE has zero RISC-V-specific commits (10-26 status)
    • 3.3 arXiv: no new entries in window, latest two stop at 10-23 (10-26 status)
  • IV. Buddy Compiler Updates
    • 4.1 VIR seven commits in one night: from loop stepping to index conventions, all filled in at once (10-26)
    • 4.2 Motivation chain: the expressiveness gaps in decode attention and RoPE (10-26)
    • 4.3 Nightly builds resume publishing, downstream anchor still stuck at 10-17 (10-26)
  • V. Community, Events, and Official Homepage
    • 5.1 Official homepage three pages unchanged, two blog posts, twenty-three documentation chapters (10-26)
    • 5.2 ruyiai-daily logs one issue, VSCode extension and WeChat account repo each see minor changes (10-26)
    • 5.3 External news zero hits, neither openRuyi 2026.10 nor ruyi 0.54.0 released (10-26 status)
  • VI. Trend Observations
    • 6.1 Upstream swaps pipelines, local swaps representations: each takes a step on the same day
    • 6.2 Release window pinned to month-end by the biweekly report, distributions enter a wrap-up rhythm of patching security and stockpiling packages

Today’s Focus: buddy-mlir Completes RVV Scalable Vectors with Seven Commits in One Night, Biweekly Report Issue 079 Finalized (10-26)

Date: 2026-10-26　Sources: buddy-mlir main branch commit list, #1002 step by vscale, #1008 index vector auto-sizing, Biweekly Progress Issue 079

The most concentrated progress this issue comes from Buddy Compiler. From 22:48 Beijing time on 10-26 to 03:22 on 10-27, all seven commits within four and a half hours landed on VIR (vectorized intermediate representation), all revolving around the same switch use-scalable: first making strip-mining loops step by vscale (#1002), then making vector size selection compute by vscale = VLEN/64 and LMUL on RVV (#1003), then lowering vir.set_vl with results to scalable vectors (#1004, #1005), adding row permutation vir.shuffle for dynamic vectors (#1006), unifying the index conventions of vir.load and vir.store (#1007), and finally fixing the assertion crash of index vectors without an explicit width (#1008). Chained together, the seven commits form a complete sequence for “making VIR genuinely expressible with scalable vectors,” rather than scattered patches.

In the same window, RuyiSDK biweekly progress issue 079 was posted to the community forum at 18:02. The reporting period ends 10-22, and this finalization gives two clear time points: package manager 0.54.0 is moved to end of October due to a release cycle adjustment, and the openRuyi monthly version remains unreleased. In-development items are also spelled out concretely—ABI compatibility detection between packages and the system, macOS packaging for more official packages, and toolchain adaptation for SpacemiT K1/K3.

Another upstream item deserves to be read alongside: the llvm-project riscv branch completed its fourth rebase in six days at 23:00 on 10-26, with the baseline advanced by another 221 commits and 26 local patches unchanged character for character; among the upstream content brought in, 17 RISC-V backend passes were migrated to NewPM by the same author within an hour. Upstream is swapping compiler pipelines while locally the vector representation is being swapped—both ends move at once, but the middle layer (triton-riscv’s dependency anchor, pytorch’s riscv branch) was not connected this issue.

I. RuyiAI Stack Progress (PyTorch / Triton / TileLang RISC-V Porting)

1.1 llvm-project: riscv branch rebased for the fourth time in six days, baseline advances 221 commits (10-26)

Date: 2026-10-26　Sources: riscv branch commit list, new head a18a0434, comparison with previous head

The riscv branch completed its fourth full-branch rewrite at 23:00 on 10-26, with head moving from 29edf281 to a18a0434; the head commit title remains “[RISCV] Add A100 HP/SP and pack/unpack lowering with calibrated scheduling (#31)”. Compared with the previous head, the branches have diverged: 221 commits ahead, 26 behind, with 300 files differing. The 26 commits behind are exactly the local patch set, and a commit-by-commit comparison shows titles and order unchanged—from #31’s A100 HP/SP and pack/unpack scheduling, through BOSC AME’s #14, #16, #18, #24, #27, Buckyball vendor extensions #20 and #23, IME builtins to A100 dot #30, down to #1, #3, #6, #11 for MLIR-JIT, nan semantics, and riscv64 CI fixes.

The rebase sequence is now 1769 commits on 10-21, 275 on 10-23, 474 on 10-25, and 221 on 10-26, with the interval compressed from “once every two or three days” to “once a day”. Zero changes to local patches indicate that day-to-day activity on this branch has fully become baseline tracking, and functional increments can only come from upstream.

1.2 llvm-project upstream: 17 RISC-V passes migrated to NewPM within one hour (10-26)

Date: 2026-10-26　Sources: InsertVSETVLI migration, PreAllocZilsdOpt migration, DeadRegisterDefinitions migration

Of the 221 upstream commits brought in by the rebase, 21 are RISC-V related, and 17 of those are NewPM ports, all authored by Aiden Grossman and concentrated between 12:59 and 13:55 Beijing time on 10-26—under one hour. The list covers the backend’s main passes: post-instruction-selection VSETVLI insertion, CSR read/write and VXRM writes, VMV0 elimination, compressed instruction generation, prologue/epilogue optimization, base address merging, LoadStore optimization, Zilsd pre-allocation, branch optimization and QCRelax marking, plus dead register definition elimination, redundant copy elimination, indirect jump tracking, landing pad setup, and constant hoisting.

The significance lies not in any single change but in pipeline ownership: these passes long lived in LegacyPM, and migrating to NewPM aligns them with the new pass manager’s analysis cache, pass ordering, and debugging interfaces. The direct impact on downstream forks is that every rebase now carries this set of changes, and -passes= names and pipeline composition move up accordingly.

1.3 llvm-project upstream, remainder: VXRM speculative writes narrowed, Zibi equality exit, GlobalISel saturating conversions (10-26)

Date: 2026-10-26　Sources: VXRM speculative writes #234972, Zibi equality exit #225619, GlobalISel saturating conversions #234885

The remaining four commits fall into three areas. On the vector fixed-point side, #234972, merged at 09:22, restricts speculative VXRM writes to loops carrying the vxrm-pipeline-flush attribute, avoiding premature rounding-mode writes in loops without flush guarantees. On the loop optimization side, #225619 at 15:01 makes LSR prefer equality comparisons as loop exits on the Zibi target, matching its zero branch delay design. On the GlobalISel side, #2316b297 at 19:31 adds legalization for G_FPTOSI_SAT and G_FPTOUI_SAT, making floating-point-to-integer saturating conversions available on the global instruction selection path.

There is also #235546 at 17:00, a pure performance cleanup: converting the analyses used by gather/scatter lowering and the VL optimizer to lazy requests. Together the four commits point in the same direction—the RISC-V backend is filling in correctness details and new-pipeline compatibility rather than adding new extensions.

1.4 pytorch: riscv branch sees zero commits for five consecutive days, seven open PRs unchanged (10-26 status)

Date: 2026-10-26 (status)　Sources: riscv branch commit list, open PR list

The riscv branch head is still 29259d90 “Add riscv64 image locally (#51)” from 03:00 Beijing time on 10-22; from 10-22 to 10-26 there have been zero commits for five consecutive days, two days beyond the three-day silence recorded last issue. The seven open PRs (#23, #35, #36, #38, #43, #46, #48) have zero hits within the update-time search window, and the two main proposals for RVV capability uplift (#46 vector extension support for ATen, #48 RISC-V Vector CPU capability) remain unchanged.

In the same window, the upstream main branch has 20 commits, all in CUDA, MPS, ROCm, and the build system, none involving RISC-V. The assessment holds from last issue but is firmer: replay on this branch is not a daily routine but manually triggered at chosen times; five days of silence is not enough to call it stalled, but it does show that its tracking of the upstream baseline has fallen behind the llvm branch’s daily cadence.

1.5 tilelang-riscv and triton-riscv: main branches silent, nightly rebuilt from the same commit (10-26)

Date: 2026-10-26　Sources: tilelang-riscv commit list, triton-riscv commit list, nightly/20261025-a305fb6, dependency update PR #88

The last commit on the tilelang-riscv main branch is still 10-16 10:52, marking the eleventh consecutive day without commits, and open PR #4 has been idle since 09-28. The triton-riscv main branch has had no commits since 10-18, but a new nightly nightly/20261025-a305fb6 was published at 05:01 on 10-26—the commit prefix a305fb6 in the tag is identical to the previous nightly/20261018-a305fb6, making this a pipeline rebuild of the same commit with no code changes.

Dependencies are also unchanged: PR #88 pins buddy-mlir to the 10-17 nightly (build number 0.1.1.dev20261017), and since then buddy-mlir has released both the 0.1.2 stable version and a 10-26 nightly, leaving the downstream two levels behind. The seven VIR changes in this issue have therefore not yet entered Triton’s operator generation pipeline.

II. RuyiSDK Toolchain and Distributions

2.1 Biweekly Progress Issue 079 Published: Package Manager 0.54.0 Moved to End of October (10-26)

Date: 2026-10-26　Source: RuyiSDK Biweekly Progress Report Issue 079, ruyi Releases, RuyiSDK Developer Community

Biweekly Progress Issue 079 (reporting period through 10-22) was posted to the community forum at 18:02 on 10-26, four days after the reporting period ended, and marks the publication following the previous daily brief’s finding that “Issue 079 had not yet been posted.” The most direct change is in the package manager timeline: due to a release cycle adjustment, 0.54.0 is now expected at the end of October, and the latest stable release remains 0.53.0; the community software repository continues routine maintenance and commits to compatibility with the last three stable versions.

There are three in-development items: detecting ABI compatibility between software packages and the current system, macOS packaging for more officially maintained software packages, and toolchain adaptation for SpacemiT K1/K3. On the base components side, glibc ported sinh, sinhf, and sinpi into the libmvec vector math framework, while newlib added six vector math functions: acosf, logf, asinf, asinhf, asinpif, and atanf; on the GCC side, Zvdota/Zvbdota support was rebased, Md support for the Ztt extension was added, and P extension support was updated to version 0.6.

2.2 openRuyi: 80 Commits, 12 PRs Merged, Security Fixes Account for Nearly 40% (10-26)

Date: 2026-10-26　Source: openRuyi main repo commit list, merged PR #1500 openjdk, PR #1440 sequoia suite, PR #1434 fwupd-efi

The openRuyi main repo saw 80 commits and 12 merged PRs this period, a gentler pace than the previous period’s 124 commits but with a clearer structure. Classified by commit title: 31 security fixes (nearly 40%), 18 new Rust crates, 13 other additions, and 14 version updates, covering 48 software packages. Activity was concentrated in two batches at 16:00 and 20:00 (Beijing time), with 29 and 43 commits respectively.

On the security line, nats-server 2.15.1, moby 29.9.2, fzf 0.74.5, etcd 3.7.2, and containerd 2.4.2 were bumped; on the version line, openjdk-latest was pushed to 27.0.1.0.2.1 and source checksums were refreshed after upstream re-tagged the source (#1500); on the packaging line, the entire sequoia OpenPGP tool suite (#1440), fwupd-efi (#1434), and the Cloudmux dependency set (#1375) were merged in one go. Three more—ollama 0.40.7, docker-cli 29.9.2, and KDE Frameworks 6.31.0—are still under review.

2.3 openRuyi: Go Backports Zvk Vector Cryptography Optimization for SHA-2 (10-26)

Date: 2026-10-26　Source: openRuyi PR #1512, openRuyi merged PR list

PR #1512, merged at 18:33, is the only distribution change in this window directly related to the RISC-V instruction set: it backports Go mainline’s Zvk SHA-2 support into openRuyi’s Go packaging. Zvk is the RISC-V vector cryptography extension family, and SHA-2 is its most commonly used algorithm suite; the backport means the Go toolchain in the distribution can use vector instructions directly on cores that support the extension, without waiting for the next major Go release.

This echoes the GCC-side Zvdota/Zvbdota rebase in Issue 079: both the toolchain (GCC) and the runtime (Go) are adopting vector cryptography at the same time, in the same direction but through different channels—the former maintained by a downstream fork itself, the latter backported via distribution patches.

2.4 packages-index and ruyi-imager: Image Version Bump, Installer Interaction Fix (10-26)

Date: 2026-10-26　Source: packages-index image commit, ruyi-imager PR #19, ruyi-imager commit list

packages-index had only one commit in the window: bumping revyos’s Milk-V Meles image and the related uboot to version 20260504, a board-level image follow-up. The low volume is consistent with the note in Issue 079—the ISCAS software repository has encountered data synchronization issues over the past two weeks, and packages that have already been built have not been refreshed to the public network, so there are no bulk updates on the package list side for now.

Both ruyi-imager commits concern interaction and the command line: the 09:00 fix makes CLI help information inherit correctly and return a non-zero exit code on usage errors (corresponding to issue #7); the 16:36 PR #19 lets the device selection dialog support double-click and keyboard confirmation, saving one click. Neither involves a new flashing target; both are usability polish ahead of release.

III. Vector Extensions, Architecture Testing, and Operator Optimization

3.1 Support Matrix Adds Bianbu 4.0.1 Test Report for Milk-V Jupiter2 (10-26)

Date: 2026-10-26　Source: support-matrix commit fc7b3c1c, Jupiter2 board description, Bianbu test report

The 22:40 commit creates a board directory for the Milk-V Jupiter2 and adds Chinese and English test reports and screenshots for Bianbu 4.0.1 (Resolute Raccoon). The test conditions recorded in the report are fairly specific: the factory-preinstalled Bianbu image requires no reflashing, power can be supplied via a USB-PD 65W adapter or ATX 2-pin 12V, and the first boot goes through the setup wizard to create a user before reaching the desktop.

This is a routine expansion of the support matrix; its value lies in cementing the “factory image works” status into the documentation—for users who want to get running right out of the box, this is one step ahead of instructions for self-flashing. The RT-Thread Smart 5.0.0 report for the RDC2022-D1s in the matrix is still among the update items in issue 079, with documentation for both boards completed in the same week.

3.2 Vector Repos and FBGEMM All Silent, IREE Has Not a Single RISC-V-Specific Commit (10-26 status)

Date: 2026-10-26 (status)　Source: VecIntrinBench, IntrinTrans, FBGEMM, IREE commit list

Several vector and operator repos had no commits this period, and all have been inactive for a considerable time: VecIntrinBench last active 02-13, IntrinTrans 06-25, cpuinfo 05-20, FBGEMM 07-13, and AME-operator 09-30. harness last active 10-10, torq-tile 04-09. Together these repositories represent over half a year of silence, indicating that vector intrinsic testing and the operator side of the RuyiAI stack are not current investment priorities.

IREE upstream saw only 1 commit in the window, unrelated to RISC-V. Last issue recorded five IREE commits with none specific; this period it drops further to one, and the signal-to-noise ratio of this external reference declines accordingly.

3.3 arXiv: No New Additions in Window, Latest Two Papers Dated 10-23 (10-26 status)

Date: 2026-10-26 (status)　Source: Comparative study of open-ISA supercomputing, Model-checking-assisted LLM repair of RISC-V processor defects, FlashAttention restructuring on long-vector processors

Searching with RISC-V plus compiler, vector, LLM, and inference as criteria, there were no new preprints in the window. The two most recent papers found are both dated 10-23: one compares the trade-offs of RISC-V, Arm, and x86 on the open-instruction-set supercomputing path, and one uses a model checker to assist an LLM in locating and fixing defects in a RISC-V processor implementation. The most on-topic for RVV remains the 10-21 paper “Reorienting the Vector Axis,” which discusses restructuring the vector-axis partitioning of FlashAttention on long-vector processors.

None of the three constitutes an immediately actionable engineering conclusion; this issue treats them only as trend references and does not form itemized technical judgments.

IV. Buddy Compiler Updates

4.1 Seven VIR Commits in One Night: Loop Stepping and Index Conventions Completed in One Pass (10-26)

Date: 2026-10-26 to 2026-10-27　Source: #1002 Step by vscale, #1003 RVV Scalable Size, #1006 Dynamic Vector Row Permutation, #1007 Unified Index Convention

Seven commits were made back-to-back by the same author from 22:48 to 03:22 the next day, numbered #1002 through #1008, all prefixed with [midend][VIR]. The content breaks down into three layers.

The first layer covers loops and sizes: #1002 fixes the step of the strip-mining loop—previously, when vir.set_vl had no result, it was lowered to a main loop stepping by a constant vector-width, yet each iteration accessed memory by N times vscale lanes, so iterations overlapped when vscale was greater than 1; #1003 makes size selection compute by vscale = VLEN/64 on RVV, so that N and SEW determine LMUL instead of falling back to fixed-length vectors; #1008 fixes an assertion triggered when an index vector without an explicit width took its size from the element bit width.

The second layer is vir.set_vl with a result: #1004 allows it to lower to scalable vectors—previously its decomposition (vl and the width vector, and the scalar of vl modulo the width) depended on a compile-time-known lane count; #1005 further supports multi-dimensional dynamic vectors, because the query in decode attention is brought in from outside the region via vir.from_vector.

The third layer is memory access and permutation: #1006 adds vir.shuffle for row permutation of dynamic vectors; #1007 unifies the index conventions of vir.load and vir.store, so that both result-bearing and result-less set_vl map rows to the dimensions before the last dimension of the memref on multi-dimensional dynamic vectors, consistent with vector.load.

4.2 Motivation Chain: The Expressiveness Gap for Decode Attention and RoPE (10-26)

Date: 2026-10-26　Source: #1005 Multi-dimensional Dynamic Vectors, #1006 Row Permutation, buddy-mlir main branch commit list

Judging from the commit messages, these seven commits are not a generalized vectorization overhaul but were forced out by specific operators. The trigger is VIR’s decode attention: RoPE’s rotate_half needs to swap the front and back halves of a 128-element head and then negate them, i.e. [-x[1], x[0]], which is essentially a row permutation; but VIR previously could not express row permutation of dynamic vectors, so the query could only be computed outside with fixed-length vectors and then brought into the region.

Thus #1006 adds permutation, #1005 adds multi-dimensional dynamic vectors, and #1007 adds the index entry point—the three together form a path that “keeps the entire decode attention inside VIR.” The significance of this path lies in portability: once the operator can be fully expressed, switching the backend between RVV fixed-length and scalable only affects lowering, not the intermediate representation.

4.3 Nightly Builds Resume, but the Downstream Anchor Remains at 10-17 (10-26)

Date: 2026-10-26　Source: Nightly v0.1.3.dev20261026, Release v0.1.2, triton-riscv dependency PR #88

buddy-mlir released the first nightly build of the 0.1.3 line at 06:37 on 10-26 (build number dev20261026), the first nightly package since 10-17, less than a day apart from the official release 0.1.2 (06:18 on 10-25). Both channels have resumed publishing, returning to the cadence of “official release plus nightly updates.”

Downstream has yet to follow: triton-riscv’s dependency update PR #88 anchors buddy-mlir at the 10-17 nightly, with no new dependency update commits since. For this issue’s seven VIR changes to actually enter operator generation, an anchor update plus a downstream rebuild is needed, and that action has not yet happened.

V. Community, Events, and Official Homepage

5.1 Official homepage’s three pages unchanged; two blog posts, twenty-three documentation chapters (10-26)

Date: 2026-10-26 (status)　Source: RuyiAI official homepage, Blog, Documentation

The sha256 of the homepage, blog, and documentation pages are consistent with the previous issue: 3 homepage index entries, 2 blog posts (Triton’s RISC-V adaptation, PyTorch RISC-V CI practices), and 23 documentation chapters. No new blog posts or chapters have been added for several consecutive windows; the official content side remains in a state of no updates, in contrast to the activity on the community side (forum biweekly reports, GitHub).

5.2 ruyiai-daily records one issue; minor changes to the VSCode extension and the WeChat articles repo (10-26)

Date: 2026-10-26　Source: ruyiai-daily repo, ruyisdk-vscode-extension commit list, wechat-articles PR #392

ruyiai-daily committed “daily-news: 2026-10-26” at 06:32, continuing its daily-archived intelligence updates. There were two other scattered changes: at 13:22, ruyisdk-vscode-extension redirected news refresh to the general refresh flow, reducing duplicate code; at 15:23, wechat-articles merged PR #392 “add preface”, adding a preface paragraph to WeChat articles. Neither affects functional boundaries; both are engineering cleanup.

The riscv-gcc repo had one push within the window, but the main branch had no commits within the window, so it was a branch-side action; the latest commit in ruyisdk-website remains the automatic API data update from 10-23.

5.3 Zero hits on external news; neither openRuyi 2026.10 nor ruyi 0.54.0 released (10-26 status)

Date: 2026-10-26 (status)　Source: Google News RSS, openRuyi distribution news page, ruyi Releases

Google News targeted queries in Chinese and English for RuyiSDK, RuyiAI, and Ruyi RISC-V returned zero hits within the window. RISC-V news captured during the same period includes MIPS’s RISC-V platform description, reports on DAMO XuanTie C950, S2C’s verification and prototype demonstration at the RISC-V China Summit, and Zhongke Tongliang’s dataflow intelligent computing products; none are related to the Ruyi community, so they are not included in this issue.

On the distribution side, both versions are still outside the window: the latest post on the openRuyi news page is still the 2026.09 release announcement (9-30), and 2026.10 has not been released; ruyi’s 0.54.0 only has an alpha tag from 09-18, and the official release, per the 079 issue’s wording, is expected at the end of October. Following the pace of previous months (6-30, 7-23, 8-27, 9-30), the October version will most likely land at the end of this month, overlapping with the 0.54.0 time window.

VI. Trend Observations

6.1 Upstream Switches Pipelines, Local Switches Representation: One Step Each on the Same Day

On 10-26, two RVV-related lines moved at the same time: upstream migrated 17 RISC-V backend passes into the NewPM, while locally VIR’s scalable vector support was completed up to the index convention. The former changes how the compiler’s internal pipeline is organized; the latter changes the intermediate representation’s ability to express RVV. Both point to the same outcome—RVV scalable vectors are no longer merely “generatable,” but “fully expressible and able to pass stably through the new pipeline.”

But the middle layer has not kept up. triton-riscv’s buddy-mlir anchor remains pinned to the 10-17 nightly, and the pytorch riscv branch has had zero commits for five consecutive days. This means that progress at both the upstream and local ends has not yet reached the two levels of the RuyiAI stack: operator generation and framework adaptation. To judge whether this stack is truly advancing, the next issue should watch two things: whether triton-riscv updates its anchor and rebuilds, and whether the pytorch branch resumes replay.

6.2 Release Window Pinned to Month-End by the Biweekly Report; the Distribution Enters a Wrap-Up Rhythm of Patching Security and Accumulating Packages

Issue 079 states two dates more clearly than before: ruyi 0.54.0 has been moved to the end of October due to a release cycle adjustment, with the current official version remaining at 0.53.0; openRuyi 2026.10 is still unreleased. Correspondingly, of openRuyi’s 80 commits this issue, 31 are security fixes, 18 are Rust crate completions, and 14 are version updates, involving 48 packages—a typical pre-release cleanup: first complete the dependency chain and clear CVEs, then cut the version.

Notably, an ISCAS software source synchronization issue has left packages-index with no package updates for nearly two weeks, which will cause what ruyi users see during ruyi update to lag behind the repository’s actual state. If 0.54.0 is released on schedule while the software source has not recovered, there will be a period of mismatch between the package manifest and the distribution version—a risk point to verify in the next issue.

Source Verification Table

Source Verification Result
RuyiAI-Stack organization (all repos) llvm-project: riscv branch rebased for the fourth time on 10-26 (head 29edf281 changed to a18a0434, 221 commits ahead, 26 behind, 300 files), with all 26 local patches unchanged one by one; 21 RISC-V-related commits in the upstream window (17 NewPM migrations); pytorch: riscv branch has zero commits for five consecutive days, seven open PRs with no updates; triton-riscv: zero commits on main, nightly rebuilt from the same commit; tilelang-riscv silent for the eleventh day; ruyiai-daily one issue; FBGEMM, cpuinfo, VecIntrinBench, IntrinTrans, harness, torq-tile, pytorch-ci, dsh-osc have no commits in the window
ruyisdk organization (all repos) support-matrix 1 commit (Milk-V Jupiter2 Bianbu report); ruyi-imager 2 commits (CLI help and exit codes, selection dialog double-click and keyboard confirmation); packages-index 1 commit (revyos-milkv-meles image and uboot bumped to 20260504); ruyisdk-vscode-extension 1 commit (news refresh deduplication); wechat-articles 1 commit (preface PR #392); ruyi zero commits and zero releases (0.53.0 maintained); riscv-gcc has pushes but no commits on main in the window; AME-operator, ruyi-tuner, linux-xuantie-kernel, ruyici, ruyisdk-website have no commits in the window; qemu’s p-dev and ame-0.6 branches are stalled at 10-21 and 10-16 respectively
openRuyi-Project organization openRuyi main repo 80 commits (Leetfs 71, luojia65 3, DingliZhang 2, cl2t 2, wxjstz 1, HeliC829 1) + 12 PRs merged; categorized as 31 security fixes, 18 new Rust crates, 13 other additions, 14 version updates, 2 Go modules; involving 48 packages; lookout repo has pushes but no commits on main in the window
buddy-compiler organization buddy-mlir 7 commits (all VIR) + nightly v0.1.3.dev20261026; buddy-examples has pushes but no commits on main in the window
RuyiSDK Developer Community Forum 1 new post: #2895 biweekly progress issue 079 (10-26 18:02), reporting period through 10-22; summit recap #2893 (10-22) remains the second newest
openRuyi distribution news page No new articles; the 2026.09 release announcement (9-30) remains the latest; 2026.10 unreleased
ruyi package manager / PyPI 0.53.0 maintained, no new alpha or beta (0.54.0-alpha.20260918 remains the most recent); main branch has had no commits since 09-25
Official homepage (ruyiai.org) Three pages unchanged: homepage index 3 items, blog 2 posts, docs 23 chapters; sha256 identical to the previous issue
IREE upstream 1 commit in the window, no RISC-V-specific changes
arXiv (RISC-V) No new additions in the window; the latest are the 10-23 open ISA supercomputing comparison and LLM-assisted RISC-V defect fixing; the 10-21 long-vector FlashAttention remains the most RVV-relevant
Google News RSS (multiple Chinese and English queries) Zero hits for targeted queries on RuyiSDK, RuyiAI, and Ruyi RISC-V; contemporaneous RISC-V news is unrelated to the Ruyi community and was not included

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