Research window: 2026-10-14 05:00 ~ 2026-10-15 05:00 (Beijing time, 24 hours; continuing from the previous daily’s cutoff).

Sources: Google News aggregation (40+ query sets in Chinese and English, via proxy), Hacker News, Phoronix, RISE Project blog, riscv.org blog, openRuyi official news page, RISC-V International member company website sweep (391 companies), the 6th RISC-V China Summit official website and source repository monitoring, as well as GitHub (pushes and commit searches across organizations and key repositories including XiangShan/NEMU/difftest/GEM5/XSCache, DAMO XuanTie XUANTIE-RV, ESWIN, Sophgo, Nuclei, Espressif, SpacemiT, Sipeed, revyos, openRuyi-Project, Radxa Linkr, OpenHW, etc.).

Index

  • Today’s Highlights: SpacemiT’s end-side Agent full stack (Bianbu AgentOS) goes public in a concentrated push: BiBit GUI and voice services release 1.0Beta1 (10-14)
  • I. Open Source Community and Software Ecosystem
    • Linux kernel patch makes “whether this machine is RVA23-compliant” a one-click check (10-14)
    • RISE Project releases RVV vector optimization results for SpeexDSP: up to 4.88x speedup in resampling (10-13~10-14)
    • openRuyi: firmware line releases “Ruyi Firmware 20261014”, K3 dual-cluster CPU mode selection lands (10-14)
  • II. Product and Ecosystem Developments
    • Dense pre-RVSC2026 updates: exhibitor promotional pieces go live in batches, agenda overview and exhibition hall info ready; Zhaosong Technology previews functional safety toolchain talk (10-13~10-14)
    • Espressif ESP32-S31 gets its first third-party development board: VIEWE 4.3-inch smart display module (10-14)
  • III. Deep Dive on Domestic Teams
    • DAMO XuanTie: DAMO-RV-ATS test suite adds BF16 vector instruction tests; Beijing industry technical seminar preview for October 22 (10-14)
    • ESWIN Computing: open-sources RISC-V matrix extension (AME) BF16 GEMM test vector library (10-13~10-14)
    • XiangShan: Kunminghu mainline optimizes L2 memory access latency; verification chain (difftest/NEMU/GEM5) continues iterating (10-14)
    • Sophgo: zsbl boot chain refactored into a two-level platform model; HD12 server firmware update (10-14)
    • Sipeed: logic analyzer software SLogic releases v2.3.0, introduces shared acquisition engine (10-14)
  • IV. Embodied Intelligence and Robotics Special Chapter
    • End-side Agent infrastructure moves toward “system-level packaging”: observations on the combined delivery of Bianbu AgentOS and K3 (10-14)
  • V. Summary and Trend Observations

Today’s Highlight: SpacemiT’s Edge Agent Full Stack Goes Public: BiBit GUI and Voice Service Release 1.0Beta1, Bianbu AgentOS Components Open-Sourced

Date: 2026-10-14　Source: bibit Release 1.0Beta1 (10-14), bibit-voice Release 1.0Beta1 (10-14), bianbu-agent-runtime initial import (10-14), bianbu-agent-memory initial public snapshot (10-14)

Following the concentrated repo creation on 10-13 (covered in the previous daily briefing), SpacemiT has pushed its edge Agent system software stack (Bianbu AgentOS) fully public within this window: the desktop BiBit GUI and offline voice service Bibit Voice released 1.0Beta1, while the Agent runtime, memory service, security components, and more were open-sourced in a batch. Key points:

  • BiBit GUI (1.0Beta1): A desktop frontend for the Agent system assistant, using the open-source project Jan as its code skeleton (React 19 + Tauri 2 + Rust, Yarn 4.5.3 build chain). It currently retains and evolves conversational interaction, rich messages, attachments, session history, and settings UI; provides Debian native packages for Bianbu 4.x riscv64 (the Yarn version is pinned in-source to accommodate RISC-V build machine memory constraints); the Agent Runtime temporarily uses a Jan-compatible implementation, with the official runtime to be integrated later via an Adapter.
  • bianbu-agent-runtime (initial open-source): A YAML-configuration-driven Agent service, self-described as the runtime core of Bianbu AgentOS — sessions as event streams (same projection across multiple endpoints), plugins can contribute Tool/Skill/Hook/MCP/Console pages, security boundaries such as securityd signed manifests and Tool approval (fail-closed in production mode); currently supports only K3 (riscv64, Bianbu 4.0).
  • bianbu-agent-memory: An on-device, local-first memory service (Rust daemon + Python SDK + Unix socket protocol) — three tiers: L1 session events / L2 working summaries / L3 long-term memory, with local full-text search, SQLCipher encryption, version conflict detection, and namespace isolation; provides a CLI, MCP service, and Runtime Bridge, and includes Hermes and DeepSeek Harness adapters.
  • Bibit Voice (1.0Beta1): An offline voice service stack for K3/Bianbu Desktop — wake word detection (KWS), voice activity detection (VAD), and speech recognition (ASR, SenseVoice/Qwen3-ASR), based on PipeWire capture and the sherpa-onnx SpacemiT runtime; exposes two layers of Unix sockets and MCP (8 tools), with the wake response sound “I’m here” distributed with the package.
  • Other components open-sourced in the same batch: bibit-intent (edge-first intent routing and tool execution), bibit-filesearch (local file search service), bibit-runtime-plugin, and bianbu-agent-security initially made public; additionally, the mpp media processing library switched to the MIT license with unified copyright notices, ai-sdk added a KWS submodule and bilingual architecture diagrams, and docs-product added skeleton product pages for the V100 series (C2201/S5236/G5201).

The above components, together with K3 hardware and the Bianbu distribution, form a vertical “chip—system—Agent runtime” combination; the Bianbu AgentOS roadmap of validating first on a single platform (K3) and then expanding to other platforms is now fairly clear.

I. Open-Source Community and Software Ecosystem

1.1 Linux Kernel Patch Makes “Is This Machine RVA23-Compliant?” a One-Shot Query

Date: 2026-10-14　Source: Phoronix: Linux Finally Making It Easier To Answer The Question: “Is This RISC-V System RVA23?” (10-14), LPC 2026 talk “RVA23 in practice” materials (10-02)

Phoronix reports: Linux users will soon be able to answer “is my RISC-V system RVA23-compliant” in one shot — a pending kernel patch provides a single-query capability (today this requires stitching together /proc/cpuinfo, hwprobe, and profile requirements item by item, and the Ubuntu-side tooling could previously only report “probably RVA23”). The article’s accompanying screenshot is an RVA23 report from a SpacemiT K3. Background (connecting to earlier coverage in this series): this capability is the **riscv_hwprobe single-bit scheme disclosed at LPC26 (KEY_BASE_BEHAVIOR: IMA RVA23U64, computed in one pass at boot from the full ISA bitmap)** — the patch series was initiated as an RFC by Andrew Jones and is now being pushed forward by Guodong Xu, reaching v8 on 10-09 (the first 8 of 11 patches were merged into riscv/for-next), with v9 to add RVA22/RVA20 tiered bits. The RVA23 profile matters greatly for unified modern RISC-V binary distribution (modern Ubuntu releases already list it as a baseline, while compliant hardware remains limited).

1.2 RISE Project Publishes RVV Vector Optimization Results for SpeexDSP: Up to 4.88x Speedup in Resampling

Date: 2026-10-13~10-14　Source: RISE Project: Accelerating Audio Processing with SpeexDSP Optimizations for RISC-V (10-13), Hacker News discussion (10-14)

The RISE (RISC-V Software Ecosystem) project published the concluding results of RP020: introducing hand-written RVV assembly to the real-time audio foundation library SpeexDSP (audio resampling, echo cancellation, jitter buffering, and preprocessing, widely used by VLC, Firefox, Wireshark, PulseAudio, Mumble, and others), along with modernizing its build and validation infrastructure. Key points:

  • Performance: hand-written vector resampling kernels versus “compiler auto-vectorized C” — floating-point kernels speed up 3.71x (Clang 18) / 3.59x (GCC 13); fixed-point kernels 2.69x (Clang 18) / 4.88x (GCC 13) (the latter was not auto-vectorized by GCC).
  • Cross-hardware validation: thanks to RVV’s length-agnostic nature, the same assembly works on both SpacemiT K1 (VLEN=256) and Canaan K230 (VLEN=128) physical platforms.
  • Spillover benefits from validation infrastructure: Meson + Checkasm verification incidentally uncovered and fixed an 8-year-old data-dependency defect in the SSE2 kernel (the inner-product kernel had previously been 0.58–0.75x slower than scalar C).
  • Organization: advanced by Google engineers in collaboration with RISE (technical lead Nathan Egge, contractor FFlabs / Tristan Matthews), with RISE funding $40,000.

1.3 openRuyi: Firmware Line Releases “Ruyi Firmware 20261014”, K3 Dual-Cluster CPU Mode Selection Lands

Date: 2026-10-14　Source: Ruyi Firmware 20261014 Release (10-14), edk2-ruyi: K3 persistent CPU selection modes (10-14), openRuyi commit log (10-14)

The openRuyi firmware line released “Ruyi Firmware 20261014”, whose core feature is CPU cluster mode selection on the K3 platform: UEFI Setup gains a mode switch, with the setting persisted to a dedicated SPI sector and read by coreboot before OpenSBI starts (taking effect on the next boot, and reverting to default on firmware upgrade); three modes are offered — X100 only (default, 8 cores, RVV VLEN 256, H extension retained), X100 + A100 (16 cores), and A100 only (8 cores, VLEN 1024) — and are displayed as k3 / k3-x100-a100 / k3-a100 in tools such as fastfetch. Implementation details: A100-only boot hands SEC from hart 0 to hart 8 via SBI HSM (reusing the stack after waiting for the original hart to stop), disables the X100 node in the UEFI handoff tree while preserving physical IMSIC slot numbering, and synchronizes the device-tree root compatible string to reflect the mode for userspace naming (no Linux source changes needed). On the main repo side, Mesa 26.2.4 upgrade and PowerVR (pvr) optimization backports, mesa-gallium recommending mesa-vulkan-drivers, and other SPECS updates were merged in tandem; the openRuyi website news page has no new release yet (latest remains 2026.09).

II. Product and Ecosystem Updates

2.1 Dense Pre-Summit Updates for RVSC2026: Batch of Exhibitor PR Pieces Goes Live, Agenda and Venue Info Ready; Zhaosong Technology Previews Functional Safety Toolchain Talk

Date: 2026-10-13~10-14　Source: Summit Website: Multiple RISC-V Ecosystem Companies Gather at the Summit (10-14), Conference Agenda, Co-Events, Zhaosong Technology Participation Preview (10-14)

The official website of the 6th RISC-V China Summit (10-18~20, Shenzhen Convention & Exhibition Center (Futian)) has entered a period of dense pre-summit updates, while Zhaosong Technology released a participation preview. Key points:

  • Batch of Exhibitor PR Pieces Goes Live (10-13/10-14): On October 13, 23 sponsor/exhibitor PR pieces went live in one batch (Lanxin Computing, SpacemiT, Tenstorrent, Beijing Institute of Open Source Chip, Lirui (ZTE Micro), MIPS, SiFive, Sophgo, StarFive, Andes, Innoda, IAR Systems, Imagination, Lauterbach, Nuclei, OPENEDGES, S2C, Zhaosong Technology, WCH, Sunzon, Suzhou Ruixin, Arteris, etc.), and on October 14, an ESWIN Computing piece was updated along with a roundup piece (featuring illustrated introductions of 28 exhibiting companies).
  • Agenda Overview Ready: The conference agenda page has been updated to a complete overview—10-18 (Sunday) features RISC-V Member Day/Workshops/Community Exchange (Narcissus Hall), GPGPU Special Session (organized by Tsinghua), AI for RISC-V Special Session, and XiangShan Processor Special Session; 10-19 Opening Ceremony and Main Forum (Plum Blossom Hall); 10-20 Seven Sub-Forums (AI Computing, High-Performance Computing, Software Ecosystem, Embedded, Chip Design and Verification, Industry-Academia Cooperation and Innovation & Entrepreneurship, Automotive Electronics, all with co-chairs announced); 10-21 RISC-V GBA/HK Day (City University of Hong Kong). The detailed agenda for the 10-20 sub-forums and the 10-21 Hong Kong Day agenda (with PDF) are online; the detailed agenda for the 10-19 main forum remains a placeholder, pending release.
  • Five Co-Events Announced: SpacemiT First Developer Conference (10-17 afternoon, Shenzhen Institute of Science and Innovation, centered on the K3 series and Bianbu OS); OpenAnolis RISC-V Ecosystem Co-Building Sub-Forum (10-18 afternoon); “One Student One Chip” Open-Source Chip Tape-Out-Ready Design Tutorial (10-19 afternoon); XiangShan Ecosystem Conference (10-20 all day); AME Matrix Extension Technology Workshop (10-20 afternoon, DAMO Academy).
  • Logistics Info Online: Exhibition hall floor plan released (Orchid Hall features open-source community booths D01–D34 and poster booths H01–H84); route and hotel guides online; organizing team announced (Summit Chair Tan Zhangxi, Vice Chairs Meng Jianyi and He Ning).
  • Zhaosong Technology Preview: Booth at Camellia Hall C18, 5th floor of the Convention & Exhibition Center; on October 20, 13:45–14:00 in Rose Hall 2, a talk titled “From Compiler to Runtime Library—Practical Implementation of RISC-V Functional Safety Toolchain” (speaker Huo Shiying). Founded in 2019, Zhaosong Technology covers advanced compilation technology, modeling and simulation, and formal methods, with products including RISC-V development tools, SoC architecture exploration, AI model deployment, and automotive-grade safety verification tools; it is a Bronze-level sponsor of this summit. The functional safety (automotive-grade) toolchain is a key supporting element for RISC-V adoption in vehicles, aligning with the summit’s Automotive Electronics sub-forum (10-20 afternoon).

2.2 Espressif ESP32-S31 Gets Its First Third-Party Development Board: VIEWE 4.3-Inch Smart Display Module

Date: 2026-10-14　Source: CNX Software: VIEWE launches 4.3-inch ESP32-S31 display development board (10-14)

Espressif’s new-generation RISC-V SoC ESP32-S31 (320MHz high-performance RV32IMAFCP core + low-power core, Wi-Fi 6/Bluetooth 5.4/802.15.4) has received its first third-party development board: VIEWE has released a 4.3-inch 800×480 smart display module (model PLCM-UES31S043H800V480C-U, $38.99). Key points: onboard ESP32-S31-WROOM-3-N16R16V module (16MB PSRAM/16MB Flash), GT911 capacitive touch, ES8389 audio codec with dual microphones, RS485/CAN interfaces, microSD (SDIO 3.0), USB-C (CH340C debug) + USB-A (OTG), supports -20~70℃; since the S31 is still a preview part, development requires using the ESP-IDF master branch with the –preview flag, and VIEWE has open-sourced LCD/touch/audio/RS485-CAN and LVGL factory UI examples on GitHub. Note: Espressif released a Linux BSP developer preview for the ESP32-S31 in August.

III. Deep Dive into Domestic Teams

3.1 DAMO XuanTie: DAMO-RV-ATS test suite adds BF16 vector tests; October 22 Beijing workshop preview

Date: 2026-10-14~10-15　Source: damo-rv-ats PR #7 merge commit (10-15 00:19), XuanTie RISC-V Industry and Technology Workshop · Beijing preview (10-14)

DAMO XuanTie (XUANTIE-RV) merged Zvfbfmin and Zvfbfwma (BF16 vector) instruction tests into its in-house RISC-V architecture test suite DAMO-RV-ATS: adding vfncvtbf16/vfwcvtbf16 (single-width conversion) and vfwmaccbf16.vf/.vv (BF16 widening multiply-accumulate) test cases and build scripts, along with four test framework documents (common infrastructure, integer vectors, floating-point vectors, vector cryptography) covering the “configure → execute → compare” methodology. In the same window, XuanTie released a preview for its Industry and Technology Workshop · Beijing: October 22, 14:00–17:15 at the Renaissance Beijing Zhongguancun Dongsheng Science and Technology Park Hotel, centered on three tracks — in-depth analysis of next-generation high-performance RISC-V processor core architecture evolution, system-technology co-optimization (STCO / Multi-Die / high-performance software stack tuning), and computing architecture in the agent era (“from AI chips to Agent chips”); registration is approval-based. XuanTie’s offline events and vector instruction ecosystem development proceed in parallel, adding another satellite event to the 10-18 summit week.

3.2 ESWIN Computing: Open-source RISC-V matrix extension (AME) BF16 GEMM test vector library

Date: 2026-10-13~10-14　Source: eswincomputing/riscv-matrix-gemm-vectors (10-14 update), update commit (10-14)

ESWIN Computing open-sourced the riscv-matrix-gemm-vectors repository (created 10-13, copyright and README added 10-14): a BF16×BF16→FP32 matrix multiply-accumulate test vector set targeting the RISC-V matrix extension (AME) specification proposal v0.6.0 — each test case is a bare-metal program (performs the operation, self-checks, and writes back a verdict), accompanied by implementation-independent reference values and a result checker check.py. Verification uses a standard rounding error bound ( Ĉ−C* ≤ γ(G)·Σ a·b , default G=K) rather than bit-exact comparison, to accommodate the “unordered summation” implementation differences permitted by the specification (when positive and negative products cancel, the correct result can be thousands of ULPs from the exact sum); it also provides two test cases where “all compliant implementations produce bit-identical results” to detect incorrect rounding. The reference values and criteria do not depend on a specific instruction set and can be reused for other matrix extension implementations, representing a domestic vendor’s test infrastructure contribution to the AME ecosystem.

3.3 XiangShan: Kunminghu mainline optimizes L2 memory access latency; verification chain (difftest/NEMU/GEM5) continues iterating

Date: 2026-10-14　Source: XiangShan #6713: reduce L2 load-to-use latency (10-14), XiangShan ICache fix (10-14), difftest: GBD1 DMA drain (10-14), NEMU #1251 (10-14), GEM5 #1228 (10-14)

XiangShan (kunminghu-v3) merged within the window a dcache performance optimization — reducing L2 load-to-use latency (#6713), and fixed ICache exception propagation (#6414) and bank selection for fetch block end offset in data ECC scenarios, and added support for Zimop (MOP) instruction decoding (decoded as add rd, x0, x0). Verification and simulation infrastructure: difftest added GBD1 frozen-bank DMA drain for GBus DiffTest (targeting FPGA scenarios); NEMU fixed AME matrix store rollback records (#1251) and vcompute REM branch determination (#1253); GEM5 restored macOS builds and added a manual smoke CI (#1228), and aligned xsstream active region determination (#1223). XSCache had no new commits on the main branch within the window.

3.4 SOPHGO: zsbl boot chain restructured into a two-level platform model; HD12 server firmware update

Date: 2026-10-14　Source: zsbl: platform subsystem and application split (10-14), mcu: HD12 firmware update (10-14)

SOPHGO made dual-track updates: zsbl (zero-stage boot loader) restructured platform organization into a “subsystem × application” two-level model — one platform can host multiple CPU subsystems, and each subsystem can run multiple boot applications (e.g., PLAT_SG2044/SG2044_MP/SG2044_MP_ZSBL), with each subsystem’s source moved into plat///, keeping only shared headers and memory maps at the platform level, and introducing platform-level Kconfig; it also renamed PLAT_BM1690TP to PLAT_BM1690 (BM1690 is the SoC, TP is the subsystem). **Server MCU/BMC firmware (mcu)** merged for the HD12 motherboard **RHS12 board compatibility, C2C interconnect links (startup/cleanup and status checks), 64GB DDR support, and MCU/BMC boot logs exposed via I2C** (firmware version bumped to 14).

3.5 Sipeed: Logic analyzer software SLogic releases v2.3.0, introducing a shared acquisition engine

Date: 2026-10-14　Source: SLogic Release release-2.3.0 (10-14), SLogic commit history (10-14)

Sipeed’s logic analyzer software SLogic released another new version the next day: v2.3.0 introduces a shared acquisition engine (requires firmware 202610140927 or above), supports 0% trigger position (host-side pre-trigger buffer), limits sample rate by link capability and adds link labels, changes cold-start timing to count from the RUN command, and fixes ngscopeclient build issues on Windows; release notes are provided in both Chinese and English. The companion ALL-LOGIC library had 7 commits within the window (trigger position, link rate limiting, debug-level real-time rate, etc.). The Sipeed organization pushed to 6 repositories within the window (also including libsigrok, scopehal, pulseview), maintaining a high cadence of logic analyzer hardware and software iteration.

IV. Embodied Intelligence and Robotics Special Chapter

4.1 On-device Agent infrastructure moves toward “system-level packaging”: observations on the combined delivery of Bianbu AgentOS and K3

Date: 2026-10-14　Source: bianbu-agent-runtime (10-14), bibit-voice (10-14), spacemit-robotics organization repositories

The main observation point on the embodied intelligence and robotics side in this window is “system-level packaging of on-device Agent infrastructure”: SpacemiT opened up the complete chain under the Bianbu AgentOS name — desktop frontend (BiBit), runtime, local memory, offline voice (KWS/VAD/ASR), and security components (see today’s highlights), and explicitly designates K3 (riscv64) as the first and currently only supported platform. For robots/edge devices, this means a self-deployable open-source stack covering “voice wake-up — intent understanding — tool execution — long-term memory — audit security” has, for the first time, a complete template on RISC-V, rather than scattered SDKs. Correspondingly, on the hardware side, the K3’s CPU cluster mode selection (X100/A100, see 1.3) provides firmware-level options for the heterogeneous division of labor of “performance cores running inference, efficiency cores running control.” In contrast, the robotics-focused organization spacemit-robotics had no new pushes within the window (the most recent pushes for peripheral IMU/motor/perception libraries were on 10-12); the combined delivery of “chip + Agent software stack + scenario packaging” is still deepening, and the software stack is moving from “usable” toward “maintainable and auditable.”

V. Summary and Trend Observations

  • On-device Agent becomes a new focus of the RISC-V software stack: SpacemiT concentratedly disclosed the full Bianbu AgentOS stack (GUI/runtime/memory/voice/security), validated first on K3 — in contrast to “server-ization” narratives such as those of BlueCore Computing, a complete open-source stack has emerged for RISC-V in the on-device AI Agent infrastructure direction.
  • Both ends of the infrastructure strengthened simultaneously: the Linux kernel rva23u64 single-bit query is nearing landing (Phoronix report; v8 portions already in riscv/for-next, v9 in progress), and RISE contributed a hand-written RVV vector kernel for SpeexDSP (up to 4.88x for resampling) — the two main lines of “qualification certification (RVA23) + multimedia performance (RVV)” are advancing in the same period.
  • Summit week approaching: RVSC2026 (10-18~20 Shenzhen) pre-event materials (promotional copy, agenda, exhibition hall map, concurrent events) are all ready, layered with the 10-17 SpacemiT Developer Conference, 10-21 GBA/HK Day, and 10-22 XuanTie Beijing Workshop; Ubuntu 26.10 with the first batch of official RISC-V desktop images is scheduled for release on 10-15, a key observation point for the next issue.
  • High-density output on the domestic engineering side: DAMO XuanTie added BF16 vector tests, ESWIN open-sourced AME test vectors, XiangShan optimized L2 memory access latency and fixed ICache, SOPHGO restructured the boot chain and server firmware, and Sipeed released two versions of SLogic in quick succession.
  • Limitations note: The Phoronix article body is restricted by site protection; the 1.1 entry was written by cross-referencing its RSS summary with public LPC26 materials; some information in the RVSC2026 entry comes from the summit’s official website and WeChat public account, and official releases shall prevail; the compliance determination details of the ESWIN test vector repository are subject to its README.

Appendix: Complete Source List

Source Verification Table

Source Verification Result
Google News aggregation (40+ query sets in Chinese and English, via proxy) Included within window: RVA23 query coverage, SpeexDSP results, VIEWE ESP32-S31 development board, XuanTie workshop preview, etc.; Excluded: Ubitium funding and ESP32-S31 chip launch and other echoes of prior/old news, IPFire and other entries unrelated to RISC-V, general semiconductor industry commentary; Chinese team keyword queries (XuanTie/XiangShan/SpacemiT/Nuclei) yielded mostly routine content and market pieces, with no major new additions beyond those already included
GitHub organization check (24-hour window) Pushes within window: espressif 39, spacemit-com 17, sipeed 6, openRuyi-Project 6, XUANTIE-RV 3; XiangShan key repositories 5, openhwfoundation 2, sophgo 2, eswincomputing 1; Nuclei-Software, thead-extension-spec, cva6 were branch-level pushes (no new additions on main branch within window); spacemit-robotics, revyos, radxa-linkr had 0 pushes within window
XiangShan key repository check XiangShan main branch 4 commits (L2 memory access latency optimization, two ICache fixes, Zimop decode); NEMU 2 commits, difftest 2 commits, GEM5 3 commits all included; XSCache had no new main-branch additions within window
DAMO XuanTie (XUANTIE-RV) damo-rv-ats merged BF16 vector tests (PR #7); damo-rv-priv-ats latest commit was 10-12 (no new additions within window); thead-extension-spec was branch maintenance (codex/fix-rv32-lwud), no new additions on main branch; offline event (10-22 Beijing workshop) included
ESWIN Computing (eswincomputing) riscv-matrix-gemm-vectors updated within window (copyright and README); repository created 10-13, 2 commits total (AME test vectors)
openRuyi dual-source Official website news page latest still 2026.09 version (no new release); GitHub side firmware line released 20261014, main repo Mesa 26.2.4 and other SPECS updates (included)
RISC-V International Foundation member website inspection (391 companies) 88 pages showed content changes (mostly vendor marketing and university news, no substantive product/funding/architecture developments detected); 66 failed to scrape (mostly domestic sites, non-blocking)
RVSC2026 official website and source repository monitoring Official website sitemap, 11 key pages, and source repository all showed no new changes; pre-event update highlights (10-13/14 batch already included in previous issue) see item 2.1
riscv.org blog and LWN No new RISC-V feature entries within window
Pending queue (WeChat official accounts) 2 items included (RVSC2026 summit updates, merged into item 2.1); queue file moved to used