Research window: 2026-10-29 06:00 ~ 2026-10-30 06:00 (Beijing time, 24 hours; Friday morning report, window continues from the cutoff of the previous daily report).

Sources: GitHub (full verification of 61 repos under org: flagos-ai, 189 commit searches, 183 merged PRs and 253 open PRs searched, 100 org event stream entries, atomic verification of Releases/Tags across 31 repos, atomic re-verification and branch checks for 5 repos, verification of key PR bodies and artifact sizes), Google News RSS (24 sets of Chinese and English query terms, via proxy), HN Algolia (8 sets), CSDN FlagOS column (page-by-page timestamp verification of articles and livestream entries), BAAI Community, official websites of eight member organizations (see appendix source list for details).

This Issue’s Index

  • Today’s Highlights: Hygon DTK 26.10 lands across three tracks (containers, compilation, communication); MiniCPM-OCR dual models achieve Day0 coverage on 12 platforms; test infrastructure ref-as-candidate dual-repo rollout (10-29)
  • I. Open Source Project Progress (GitHub Activity)
    • 1.1 Organizational cadence: 21 repos pushed, 189 commits, 183 merges, 253 under review (10-29 ~ 10-30)
    • 1.2 Release side: FlagTree tags a dedicated Qingwei 3.6 build; FlagCX v0.14.1 moves from tag to wheel line (10-29)
    • 1.3 FlagGems: KernelGen merges 22 operators in a single day; Kunlunxin XPU3 foreach fusion wraps up (10-29)
    • 1.4 Test infrastructure: ref-as-candidate dual-repo rollout, 57 test PRs closed in a single day (10-29)
    • 1.5 Inference and training stack: GLM-5.3-Flash and Qwen3.8-Flash dual models enter the plugin (10-29)
    • 1.6 Compilation and communication: Moore Threads persistent GEMM and SPMC land on mainline; FlagCX adds device interfaces for two vendors (10-29)
    • 1.7 Build and release: eight Hygon DTK 26.10 merges; Ascend rpm targets and 2.3.0 image description (10-29)
    • 1.8 Quantum line: FlagQuantum at sixty commits, CS-01 through CS-07 synthesis pipeline connected end to end (10-29)
    • 1.9 Other repos: OpenCourse textbook restructuring, FlagScale and TransformerEngine-FL converge CI (10-29)
  • II. News Coverage and Ecosystem
    • 2.1 MiniCPM-OCR dual models adapted to 12 platforms on Day0; DAMO XuanTie reaches 98.7% of native throughput (10-29)
    • 2.2 CSDN tech livestream: one plugin connects inference adaptation across ten chips (10-29)
    • 2.3 Channel check: no new hits on HN or the BAAI community; CSDN column adds one article and one livestream (10-29)
  • III. Member Units and Backend Vendors In Depth
    • 3.1 Hygon: DTK 26.10 lands end to end from containers to wheels (10-29)
    • 3.2 Qingwei: Triton 3.6 backend merged in sync and a dedicated tag cut (10-29)
    • 3.3 Kunlunxin: XPU3’s foreach fusion chain and constant grid wrap up (10-29)
    • 3.4 MetaX: grouped GEMM INT8 and FP8 paths, TP2 decode scheduling (10-29)
    • 3.5 Moore Threads: TLE persistent GEMM and SPMC land on mainline in sync (10-29)
    • 3.6 Enflame, Ascend, DAMO XuanTie: four lines of attention and normalization operators (10-29)
    • 3.7 Tianshu: Tiange 300 makes its first live on-site demo, claiming 1.05x H200 single-card throughput (10-28)
  • IV. Summary and Trend Observations
  • Appendix: Source verification table and complete source list

Today’s Highlights: Hygon DTK 26.10 lands across three tracks (containers, compilation, communication); MiniCPM-OCR dual models get Day0 coverage on 12 platforms; test infrastructure ref-as-candidate lands in two repos (10-29)

Date: 2026-10-29　Sources: build-infra PR #1554 · build-infra PR #1562 · build-infra PR #1563 · MiniCPM-OCR Day0 adaptation · FlagGems PR #7630 · FlagGems-sglang PR #249 (full list in appendix)

  • Build side: Hygon DTK 26.10 completed eight merges in a single day — base container (#1554, +78 lines), runtime configuration (#1555, +21 lines), availability fix (#1558, pointing /opt/dtk at dtk-26.10 and adding runner coverage), FlagTree’s cp312 hcu builder (#1562, 4 files, +342 lines), FlagCX’s dtk2610 wheel line (#1563, 3 files, +185 lines), adding libopenmpi3t64 to the base image (#1564), adding libopenmpi3 to the builder (#1565), and adding hcu-dtk2610 to the FlagTree wheel release line (#1566). This is the first time the stack has changed containers, compiler builders, and communication-library packaging in parallel for a new vendor SDK version, because DTK 26.10 pins the runtime to python 3.12 and torch==2.13.0+dtk2610 (cp312 only), so existing cp310 hcu wheels cannot be resolved in that runtime at all.
  • News side: The Zhongzhi FlagOS community delivered Day0 cross-chip adaptation for ModelBest and OpenBMB’s open-source MiniCPM-OCR 1.0 (1.3B) and MiniCPM-OCR Jev (2B), covering 12 platforms: DAMO XuanTie, NVIDIA, Huawei Ascend, Hygon, Kunlunxin, MetaX, Moore Threads, Tsingmicro, Tianshu Zhixin, Enflame, Mac (ARM), and ESWIN. The benchmark metric is throughput normalized to hardware peak compute: Jev reaches 98.7% of native NVIDIA compute throughput on DAMO XuanTie, while OCR 1.0’s P50 throughput per unit peak compute reaches 169.3% of native NVIDIA in the single-document scenario and 137.1% in the batch scenario.
  • Test side: FlagGems’ --ref-as-candidate and explicit get_candidate selection landed on main (#7630, 9 files); FlagGems-sglang converted all correctness suites to get_candidate the same day across eleven PRs from #239 to #249, and added a daily automated master-to-kernelgen-dev sync PR. Together, the two repos mean reference implementations can run directly as candidates without external candidate files — tests are no longer a “does the operator exist” switch but a comparison of “does the implementation match the reference.”
  • Takeaway: All three tracks point to the same thing — the software stack’s bottleneck is shifting from “writing the operators” to codifying three kinds of engineering discipline: the build assumptions of a new SDK, the execution path of reference implementations, and the cross-chip comparability of models. The eight DTK 26.10 merges show that the cost of a hardware generation switch falls almost entirely on packaging and dependency resolution rather than the kernels themselves; meanwhile, the MiniCPM-OCR benchmarks provide, for the first time, two sets of comparable numbers: normalized throughput and on-device latency.

I. Open-Source Project Progress (GitHub Activity)

1.1 Organization cadence: 21 repos pushed, 189 commits, 183 merged, 253 under review (10-29 ~ 10-30)

Date: 2026-10-29 ~ 2026-10-30　Sources: flagos-ai org repositories · Commit search · Merged PR search · Open PR search

  • Repos: 21 of 61 repos had pushes in the window (23 in the previous period). Ordered by push recency: FlagGems, Torch-FL, FlagGems-sglang, FlagQuantum, vllm-plugin-FL, FlagQAI, FlagTree, FlagScale, OpenCourse, build-infra, FlagCX, FlagGems-vllm, FlagSparse, release-info, docs, optest, FlagTrain, FlagOps, FlagFFT, FlagAttention, TransformerEngine-FL.
  • Commits: The commit search returned 189 hits, the highest in two weeks (99 in the previous period), broken down as FlagQuantum 60, FlagGems 43, build-infra 15, FlagGems-sglang 14, FlagQAI 11, FlagGems-vllm 9, FlagAttention 8, Torch-FL 6, FlagTree 5, FlagTrain 4, vllm-plugin-FL/FlagCX/OpenCourse 3 each, optest/FlagOps 2 each, FlagScale 1. FlagQuantum and FlagGems together account for 103.
  • Merges: 183 merged PRs (67 in the previous period, a 1.7x increase), broken down as FlagGems 92, build-infra 16, FlagQuantum 15, FlagGems-sglang 11, FlagGems-vllm 9, FlagAttention 8, Torch-FL 6, FlagTree 5, vllm-plugin-FL 4, FlagQAI 4, FlagCX 4, FlagTrain 4, optest 2, FlagScale/FlagOps/TransformerEngine-FL 1 each.
  • Under review: 253 open PRs updated in the window (288 in the previous period), with 84 newly opened (101 in the previous period). FlagGems 129, FlagTree 22, FlagGems-vllm 15, vllm-plugin-FL 10, Megatron-LM-FL 10, FlagTrain 9, FlagAttention 8, FlagScale 7, sglang-plugin-FL 6, Torch-FL 5, FlagGems-sglang 5, flir 5, FlagCX 4, docs 4, and 1–2 each for the remaining repos.
  • Cadence comparison: Versus the previous 24-hour window (23 repos, 99 commits, 67 merges, 288 open), pushed repos fell by 2, commits rose 91%, merges rose 173%, open PRs fell 12%, and new PRs fell 17%. The jump in merges comes mainly from FlagGems operator volume (92) and the FlagQuantum synthesis pipeline (15), not from looser review standards—the total open count continued to decline over the same period.
  • Releases and events: An atomic check of Releases and Tags across 31 repos found one new tag in the window (FlagTree’s Tsingmicro 3.6-specific tag, 10-29 11:09); FlagCX v0.14.1’s archive timestamp moved up to 10-29 10:55, the same moment #683 was merged back into 0.14.0-rc2. The org event stream had 100 entries: 34 PR review comments, 34 PR events, 13 pushes, 8 branch creations, 9 issue comments, 1 branch deletion, 1 fork—a clear shift toward review activity versus the previous period (51 pushes, 32 branch creations), consistent with the rise in merges.
  • Branches: The 5 pushed repos not covered by the commit search were verified atomically.
    TransformerEngine-FL had one commit in the window (#142’s FlagCICD v1, 10-29 09:51); FlagFFT’s pushes landed on the codex/musa-shortfall feature branch (multiple pushes on 10-28; the default branch’s latest commit is still 10-15); release-info’s pushes were on the gh-pages branch (automatic publishing of the release site); docs and FlagSparse saw PR-branch and issue-comment activity, with no new commits on the default branch.

1.2 Releases: FlagTree tags a Tsingmicro 3.6-specific build; FlagCX v0.14.1 moves from tag to wheel line (10-29)

Date: 2026-10-29　Sources: FlagTree Tsingmicro 3.6 tag · FlagTree PR #1459 · build-infra PR #1553 · build-infra PR #1556 · build-infra PR #1563

  • FlagTree tag: A Tsingmicro 3.6-specific tag was created at 10-29 11:09, on the same “vendor-partitioned 3.6 pre-release line” as the Moore Threads 3.6-specific tag from 10-26. The tag has no release body in the Releases API (returns 404), indicating it is a tag archive rather than a Release with notes; #1459, merged the same day, is precisely the commit syncing the Tsingmicro backend to the internal Triton 3.6 development line.
  • FlagCX delivery: v0.14.1 appeared in the previous window as a git tag (no Release body); in this window it was formally registered in build-infra’s wheel catalog—the bot recorded the release (#1553), a human filled in five empty descriptions and added the AMD row flagcx==0.14.1+rocm7.2.4 (#1556, 10 files, +28/−16), then pinned the hygon-dtk26.10 line to flagcx==0.14.1+dtk2610 (#1563). The 0.14.1 delivery surface now covers cuda12.8, cuda13.3, corex4.4.0, corex4.5.0, xre5.37.1, rocm7.2.4, and the new dtk2610.
  • Issue-driven fixes: FlagTree #1481 fixes the CompiledKernel metadata check on Metax for issue #1473 (1 file, +2/−1); FlagGems #7989 fixes the Ascend cat operator (+57/−36); FlagTree #1468 and #1470 add CI and TLE unit tests for Enflame.
  • Watch item: FlagTree’s 3.6 line advances via “one tag per vendor,” and 0.7.1a1 still has no unified release notes; if the 2.3 cycle ships along this line, downstream users will have to infer backend and Triton versions from tag names—the same class of problem as FlagCX v0.14.1 lacking a release body.

1.3 FlagGems: KernelGen merges 22 operators in a single day; Kunlunxin XPU3 foreach fusion wraps up (10-29)

Date: 2026-10-29　Sources: FlagGems PR list · PR #7116 · PR #6950 · PR #6530 · PR #7989

  • KernelGen: Of the 92 merges, 22 were [KernelGen][Nvidia] auto-generated operators, covering sparse tensors (sparse_csc_tensor_unsafe, sparse_bsc_tensor_unsafe, sparse_resize_), convolution and pooling (nnpack_spatial_convolution, thnn_conv2d, fractional_max_pool3d_backward, mkldnn_reorder_conv2d_weight), linear algebra (cholesky, frobenius_norm, chain_matmul), and a batch of edge-case operators (argwhere, _indices, make_dual_copy, flatten_dense_tensors, combinations, empty_per_channel_affine_quantized). The single-day batch is the densest recently for this line, and five more (#8009 to #8013) were opened the same day—the queue continues.
  • Kunlunxin: The XPU3 foreach fusion chain closed out within a day.
    List executors for cos/exp/sin/addcdiv/lerp (#7116), a maskless fused kernel for ceil (#7604), in-place fused kernels for tanh/expm1 (#7608); followed by four correctness fixes: fmin switched to a constant-emission grid (#7966), the t_copy 1-D path likewise switched to a constant grid (#7973), foreach scalar dtype branches made mutually exclusive (#7974), and the foreach add list slot changed to be indexed by program_id(0) (#7968). euclidean_dist, is_same_size, and layer_norm_backward also received XPU optimizations (#7907).
  • MetaX: Added INT8 and FP8 grouped_mm_w8a8 (#6950, 7 files, +1220). The benchmark replays real call shapes collected from GLM-5.2 on PPU SGLang TP=8 onto a MetaX C550—28 scenario records, 26 unique (M,N,K,E) geometries, 3.24 million calls, 257 experts.
  • Other: Operator precision fixes for AMD W7900 (gfx1100) (#6530); the vendor-local implementation of Ascend log_ grid-fill rerun merged back into 5.4.0-rc2 (#6586); on the CI side, import order fixed (#7951), release builds moved from the removed cp38 to cp310 (#7975), vendor names made to follow the runtime version (#7961), and FP8 MM tests changed to skip based on registered backends (#7812).
  • Assessment: Operator volume is now carried by KernelGen, with human effort concentrated on two things—launch-parameter correctness for new backends (four Kunlunxin PRs) and test executability (see 1.4). This explains why the 92 merges contain almost no trunk semantic changes.

1.4 Test infrastructure: ref-as-candidate lands in two repos; 57 test PRs closed in a single day (10-29)

Date: 2026-10-29　Sources: FlagGems PR #7630 · FlagGems-sglang PR #239 · FlagGems-sglang PR #241 · FlagGems-sglang PR #249 · FlagGems-sglang PR #242

  • Mechanism: --ref-as-candidate lets correctness tests and benchmarks run an explicitly declared reference implementation as the candidate (get_candidate("negative", reference=torch.negative)), no longer relying on external candidate files. A missing reference, a non-callable reference, or a test body that never actually calls the candidate all fail explicitly; skips and xfails cannot mask contract errors, and an all-skipped run does not count as a valid execution. Validation comprised 26 host regressions plus 32 checks against master and the PR merge preview.
  • Rollout: FlagGems-sglang merged 11 PRs the same day, moving all correctness suites to get_candidate (#241), completing reference declarations (#240, #244), adding benchmark case enumeration and replay (#239), adding a definitions directory with a silu_and_mul example (#245), and adding mrotary_embedding candidate comparison with a portable reference and cross-device native validation (#247, #249).
  • Scale: 57 test fixes by a single author merged in one day (mostly reference contracts, fixtures, and benchmark entry-point corrections across backends), covering skip conditions and reference ABIs for Ascend, MetaX (MUSA), Enflame, Kunlunxin, and Nvidia.
  • Automation: Added a daily automatic master to kernelgen-dev sync PR (#242); the bot has already produced two syncs that day (#243, #246). This chain turns drift between “upstream trunk” and the “KernelGen development line” from manual rebases into a once-daily auditable merge.
  • Assessment: Once tests shifted from “passing” to “comparable,” the tests themselves began to need reference-implementation contracts; that is the real content of the day’s 57 fixes—not adding tests, but adding references.

1.5 Inference and training stack: GLM-5.3-Flash and Qwen3.8-Flash both enter the plugin (10-29)

Date: 2026-10-29 ~ 2026-10-30　Sources: vllm-plugin-FL PR #455 · vllm-plugin-FL PR #454 · vllm-plugin-FL PR #615 · FlagTrain PR #35 · FlagGems-vllm PR #1025

  • Qwen3.8-Flash: vllm-plugin-FL adds checkpoint loading and model integration for Qwen3.8-Flash-Next and Qwen4 (#455, 65 files, +11226/−109), including HC, PLE, QSA, and multimodal wiring, with numerical operators routed through FlagGems-vllm. FP8 is capability-gated: native kernels are kept where the platform supports them natively (Nvidia requires compute capability 8.9+, AMD defers to vLLM’s ROCm implementation), otherwise it falls back to BF16 linear and MoE paths and forces --dtype bfloat16.
  • GLM-5.3-Flash: A pure public-operator implementation merged in the early hours of the next day (#454, 90 files, +19140/−280). Indexer precision is chosen before cache allocation: FP8 is kept on Nvidia SM89+, Moore Threads MP31+, and GCU capability 4+; other vendors and unknown capabilities use BF16; BF16 on MetaX and Kunlunxin cannot be downgraded via the corresponding radix compile path, so they use the existing Torch TopK, scatter, and sort paths.
  • Runtime: Native CUDA adaptation for vLLM 0.32 (#615, 57 files, +3408/−1044) pins the stack to vLLM 0.32.0+cu129, PyTorch 2.13.0+cu129, CUDA 12.9, and python 3.12.3, with FlagGems on a 5.4.0 dev commit and FlagTree on a 0.7.0 dev commit (providing Triton 3.6); all 6 existing NVIDIA CI inference tests and 3 serving tests pass.
  • Training: FlagTrain adds multi_tensor_adam (#35, 6 files, +1093), completing multi-tensor Adam updates in a single Triton launch, with backends covering Nvidia, Hygon, MetaX, PPU (DAMO XuanTie), and Iluvatar; the same window also saw fused_proj_rms forward/backward (#38), fast_gelu (#33), and a deepspeed dependency (#42). In the original H20 benchmark, the fp32 65536-element tier is 2.24x the DeepSpeed CUDA baseline, while the small 1024-element tier is actually slower at 0.76x.
  • Inference optimization: On the FlagGems-vllm side, Split-KV scheduling and compute-tile reordering for MetaX TP2 packed decode (#1025); gated incremental networks for FP8 W8A16 with dynamic state quantization (#988); MUSA FP8 variable-length attention retuned for the current CI compiler (#970); fused_q_kv_rmsnorm landed on both Ascend (#872) and DAMO XuanTie (#888).

1.6 Compilation and communication: Moore Threads persistent GEMM and SPMC enter mainline; FlagCX adds device interfaces for two vendors (10-29)

Date: 2026-10-29　Sources: FlagTree PR #1294 · FlagTree PR #1459 · FlagCX PR #678 · FlagCX PR #681 · FlagCX PR #679

  • Moore Threads: The [MThreads][TLE] persistent GEMM pipeline and SPMC synchronization entered mainline (#1294, 63 files, +6192/−403). This is not a port of old files but a re-migration based on the current main’s pipe, warp specialize, and SQMMA representations, merging the previously separate compilers (the common version for addmm/baddbmm, the SPMC version for bmm) into one superset: supporting stage and phase advancement in dynamic loops, one producer to many consumers, named and implicit reads, segmented completion with consumer epoch derivation, and single-issue, fused-consumer, and 16-warp persistent paths.
  • Tsingmicro: The backend was synced to the internal Triton 3.6 development line (#1459, 27 files, +2264/−407), touching only third_party/tsingmicro/—restoring the per-launch precision interface, external CoreIR entry point, and runtime adapter needed by FlagGems-side vendor operator dispatch, and fixing Tx81 code generation and CRT defects in DMA, RDMA, and WDMA.
  • Kunlunxin: FlagCX adds a device IR entry point for XPU to support FlagTree linking (#678, 5 files, +178/−21).
  • Iluvatar: FlagCX’s Device API backend adds acquire semantics to Atomic::load (#681, 3 files, +359/−37). Previously load(..., Acquire) and load(..., Relaxed) emitted the same instruction, leaving observers without a fence after seeing a flag; this PR changes it to read-then-fence, selecting strength by scope, and adds the address-space symbol for launchKernel and the getLastError slot. System scope remains unimplemented because ivcore11 has no corresponding memory barrier instruction.
  • AMD: Tensor parallelism for SGLang now works on ROCm (#679, 6 files, +77/−19)—adding an eventElapsedTime implementation, mapping torch.bool to flagcxUint8, and adding a USE_AMD test build branch; on dual R9700 cards, AllReduce, ReduceScatter, AllGather, Broadcast, Send/Recv, and graph-captured AllReduce produce correct results, and Qwen3.5-9B and Qwen3.6-35B-A3B-FP8 can serve at TP=2.

1.7 Build and release: Eight Hygon DTK 26.10 merges; Ascend rpm target and 2.3.0 image descriptions (10-29)

Date: 2026-10-29　Sources: build-infra PR #1554 · build-infra PR #1558 · build-infra PR #1565 · build-infra PR #1566 · build-infra PR #1557 · build-infra PR #1560

  • Full DTK 26.10 chain: The order of the eight merges is itself a troubleshooting chain. After the first container and config landed (#1554, #1555), the image still could not build or schedule: #1558 noted that base/hygon-dtk26.10 still pointed /opt/dtk at dtk-26.04, and that .github/build-config.yml lacked a runner override for that entry, falling back to the h20 default. Then torch 2.13.0+dtk2610’s libtorch_global_deps.so directly linked libmpi.so.40 and libibverbs.so.1, whereas the 26.04 wheel hashed these two sonames into the package, so this line needs libopenmpi3t64 added to the base image (#1564) and libopenmpi3 added to the builder (#1565).
  • Version line: The same runtime pins python 3.12, making existing cp310 hcu wheels unresolvable; #1562 rebuilds the cp312 hcu builder with deadsnakes 3.12 and installs the DTK 26.10 Ubuntu22.04 SDK, and #1566 then adds hcu-dtk2610 to the wheel release line’s target options, so that flagtree==0.7.0+hcu3.6 can be published to the Hygon source as plain flagtree.
  • Ascend rpm: Added a FlagTree Ascend rpm target (#1557, +44/−4), compiling the cp311 and aarch64 wheels produced by the Ascend delivery pipeline, which exactly match openEuler 24.03’s aarch64, hence only one line enabled; this is also the first rpm line that does not depend on a vendor SDK or hardware.
  • 2.3.0 signs: The runtime image description was refreshed twice (09:44 and 18:26) (#1552, #1561), and the changelog date is booked against hygon-dtk26.10 (#1560). However, release/2.3/release-2.3.yaml in the community repo is still 404, indicating the 2.3 release manifest has not yet been created and progress currently stops at the build layer.
  • Release efficiency: Also, vllm repackaging dependencies switched to PEP 503 page parsing (#1543) and actions/setup-python was bumped from 7.0.0 to 7.1.0 (#1550).

1.8 Quantum line: FlagQuantum’s 60 commits; CS-01 through CS-07 synthesis pipeline connected end to end (10-29)

Date: 2026-10-29　Sources: FlagQuantum repo · FlagQuantum PR #960 · FlagQuantum PR #964 · FlagQuantum PR #966 · FlagQuantum PR #967 · FlagQAI repo

  • Scale: FlagQuantum had 60 commits and 15 merges in one day, all concentrated on a single line—quantum circuit synthesis (the CS series). The repo’s docs/roadmap/ and docs/api-changes/ have archived ten specification and delivery documents under FQ-SYNTH-CS01..CS07-20261029.
  • Pipeline: CS-01 defines the semantic boundaries and validation of coherent integer construction, CS-02 lowers coherent addition with a pure arithmetic kernel, CS-03 handles multiplication and coherent polynomials, CS-04 connects a restricted Python workflow, CS-05 adds lifecycle and workspace scheduling, CS-06 lands in three parts (execution contract, candidate cost selection, single-user workflow), and CS-07 moves into register semantics and program admission. The same day also added save/load for portable .fqx experiment files (#960) and checked program execution for fq.run (#964).
  • Under review: CS07-C’s restricted native Qmod frontend (#967) was opened at 17:30, translating an unsigned main with a single output into the existing compiler’s register and expression model, without executing text, generating Python callables, or selecting a backend.
  • Companion FlagQAI: The related FlagQAI (repo created 10-10) had 11 commits and 4 merges in one day, adding a local quantum workbench web page with native Agent integration (#3) and a fix to preserve follow preferences after refresh (#4). The repo’s README explicitly lists “synthesizing circuits from intent” as a product direction rather than a completed capability; current validation scope covers only local circuit simulation and a two-qubit variational path with one fixed ansatz.
  • Assessment: This line has the highest degree of independence in the stack—no multi-chip adaptation, only a middle layer that “translates scientific problems into executable circuits.” Its value lies in giving the 2.x cycle a chip-agnostic software-stack use case.

1.9 Other repos: OpenCourse courseware reorganization; FlagScale and TransformerEngine-FL converge CI (10-29)

Date: 2026-10-29　Sources: OpenCourse commits · FlagScale PR #1315 · TransformerEngine-FL PR #142 · optest PR #18 · FlagOps PR #18

  • OpenCourse: Three commits reorganized course resources (17:07, 19:59) and renamed the faculty development edition directory (21:53), and added a lab mainline. This is part of the same batch as the community’s ongoing global faculty development program.
  • FlagScale: Unified test strategy, affected routes, and execution-evidence gates into one scheme (#1315). On the open side, a new round of training-stack work is visible: DeepSeek-V4 upstream sync [1/N] (#202) and [2/N] (#211, adding continuous context parallelism for packed sequences), plus lightweight DCP interconversion between HF and MCore (#1319).
  • TransformerEngine-FL: Implemented FlagCICD v1, introducing L0–L4 test tiers and plan-driven execution (#142).
  • optest and FlagOps: optest fixed CI target references and operator test diagnostics (#18) and rewrote the README (#17); FlagOps’ robust checkout clears stale git locks left by hard-killed fetches (#18).

II. News Coverage and Ecosystem

2.1 MiniCPM-OCR Dual Models Day0-Adapted to 12 Platforms; DAMO XuanTie Reaches 98.7% of Native Throughput (10-29)

Date: 2026-10-29　Source: FlagOS Day0 Adaptation for MiniCPM-OCR & Jev · FlagRelease Model Card Entry · vllm-plugin-FL Documentation · Torch-FL Documentation

  • Models: ModelBest, in collaboration with OpenBMB, has open-sourced the MiniCPM-OCR series. The 1.3B MiniCPM-OCR 1.0 targets real-world document scenarios such as scans, photos, curved pages, and re-photographed documents, supporting text, formula, and complex table parsing plus key-information extraction; it scores 93.68 on Real5-OmniDocBench in official evaluations, and the DSpark decoding acceleration backend improves end-to-end efficiency by 55%. The 2B MiniCPM-OCR Jev acts as an “AI quality inspector,” scoring the reliability of parsing results and able to connect to different OCR models; it achieves an overall AUROC of 0.936 on JevOCRBench, close to Qwen3.5-397B-A17B’s 0.938.
  • Platforms and paths: Coverage spans 12 platforms: DAMO XuanTie, NVIDIA, Huawei Ascend, Hygon, Kunlunxin, MetaX, Moore Threads, Tsingmicro, Tianshu Zhixin, Enflame, Mac (ARM), and ESWIN. Jev is integrated via Torch-FL, while OCR 1.0 goes through inference framework plugins (vLLM-plugin-FL or SGLang-plugin-FL); both rely on FlagGems operator implementations and FlagTree compilation support at the底层. Version baseline: vLLM v0.24.0, vllm-plugin-FL v0.3.0, FlagGems v5.4.0.
  • Performance basis: On NVIDIA, Jev runs Torch-FL + FlagGems + FlagTree; with 12 samples, batch 1, and single-card BF16, average discrimination is 76.2 ms versus 62.7 ms native, giving actual compute throughput at 82.3% of native. On DAMO XuanTie, the average is 63.56 ms, with throughput reaching 98.7% of NVIDIA H100 native. OCR 1.0 on DAMO XuanTie runs vLLM-plugin-FL + FlagGems + FlagTree; both sides use single-card BF16 (peak compute taken as 989 TFLOPS and 123 TFLOPS), and after peak-normalization, single-document P50 throughput is 169.3% of native and 137.1% in batch scenarios.
  • On-device: The ARM side covers Mac and ESWIN. Jev uses only the M5 CPU; across 12 samples, average per-page-block discrimination is 1.2 s with a median of 895 ms, excluding prior full-page OCR parsing. The implementation retains BF16 weights and the discrimination head, uses SME2 matrix instructions to accelerate the main linear layers, and hooks into the operator execution path via Triton TLE Raw.
  • Observation: This is the first recent adaptation note to present “cross-chip throughput” and “on-device latency” under a single consistent basis—98.7% is an actual throughput ratio, while 169.3% is a ratio normalized by peak compute; the two are not interchangeable. The article also honestly states that the 169.3% figure holds on the premise that lower-peak-compute platforms achieve higher utilization, not that a single card is faster.

2.2 CSDN Tech Livestream: One Plugin Connects Inference Adaptation Across Ten Chips (10-29)

Date: 2026-10-29　Source: Livestream page: The LLM Inference Lifesaver—One Plugin Handles Multi-Chip Adaptation

  • Facts: The FlagOS community listed a tech livestream on 10-29 at 16:25 and began broadcasting at 19:00, on the topic of cross-chip inference adaptation with sglang-plugin-FL. The plugin is an out-of-tree external inference plugin built on top of SGLang that does not intrude into the kernel source code.
  • Technical highlights (page summary): It interfaces with different hardware through mechanisms including ATen operator replacement, fused-operator scheduling, unified communication abstraction, KV Cache transfer under PD disaggregation, and dependency splitting in Empty mode; the description states it has been adapted to ten chip platforms including Ascend, Hygon, and Kunlunxin.
  • Corresponding code side: Within this window, sglang-plugin-FL has 6 PRs under review updated, including Empty runtime adaptation for Ascend and Tianshu on SGLang 0.5.18 (#160, #139), Kunlunxin upgrade to 0.5.18 (#155), and reuse of native Mooncake PD control over generic FlagCX transport (#142). The livestream content aligns with the direction of code progress.
  • Observation: The community’s content cadence has shifted from “launch-event-style presentations” to “single-topic technical livestreams broken down by plugin”; this session, together with the 10-22 university roundtable and the 10-15 operator bounty challenge, forms a continuous technical communication line.

2.3 Channel Check: No New Hits on HN or BAAI Hub; CSDN Column Adds One Article and One Livestream (10-29)

Date: 2026-10-29　Source: HN Algolia · BAAI Hub · CSDN FlagOS Column

  • CSDN Column: After checking the page’s 15 entries page by page, two new items were confirmed within the window—the MiniCPM-OCR and Jev Day0 adaptation article published 10-29 11:19 (see 2.1), and the sglang-plugin-FL livestream listed 10-29 16:25 and started 19:00 (see 2.2). The GLM-5.3-Flash (8-28), Qwen3.8-Flash-Next (8-27), and LightX2V integration pieces ranked near the top of the page are old articles from late August and are not counted in the window.
  • HN: Eight query groups (FlagOS, FlagGems, FlagScale, FlagTree, BAAI, FlagQuantum, FlagSparse, flagos-ai) returned 6 to 30 hits within the 4-day window, but direct matching by title and body yielded 0—these are false hits on homonyms.
  • BAAI Hub: Neither the homepage nor the search page has new entries related to the software stack within the window; the search page is client-rendered and its entry list cannot be scraped, so the homepage check is authoritative.
  • gnews: 24 Chinese and English queries returned 30 hits in total within the window; after filtering each by title and body, only one is related to FlagOS—a 10-29 article from Embodied Home on Huixi Intelligent’s participation, which refers to the 2026 AI Open Computing Conference and Zhongzhi FlagOS Technology Conference held 10-17 to 10-18. It is a post-conference传播 piece, not a new event within the window, and is not listed as a separate item. The rest are STAR Market market updates, board resolutions, industrial park investment promotions, and fund holdings pieces, removed in bulk by title keywords.
  • Member official sites: Among the eight sites inspected, MetaX’s official site has a new 10-29 entry, “From Token Efficiency to Open-Source Collaboration, Embracing the Next Decade of AI Infra MetaX CNCC 2026 Sub-forum Recap,” which is a conference recap and does not involve software stack changes; Moore Threads’ latest is a 10-28 illustrated Q3 report; the lists for Tianshu, Hygon, Cambricon, Enflame, and Tsingmicro have no new entries from 10-29 to 10-30; Horizon’s scrape failed, so the visible list content is used as the basis.

III. Deep Dive into Member Units and Backend Vendors

3.1 Hygon: DTK 26.10 Full-Chain Rollout from Containers to Wheels (10-29)

Date: 2026-10-29　Sources: build-infra PR #1554 · build-infra PR #1558 · build-infra PR #1562 · build-infra PR #1563 · build-infra PR #1565 · FlagAttention PR #109 · FlagTrain PR #35

  • Container layer: Added base containers and runtime configuration for DTK 26.10 (#1554 adds 78 lines, #1555 adds 21 lines); the initial rollout explicitly noted that “FlagCX is not yet built, so it is excluded at this stage.” Fix-up PR #1558 resolved two blockers at once: base/hygon-dtk26.10 pointed /opt/dtk to dtk-26.04 while the SDK actually unpacked to /opt/dtk-26.10, and the build matrix lacked runner coverage for that entry, causing it to fall back to h20.
  • Dependency layer: The global dependencies of torch 2.13.0+dtk2610 link directly against libmpi.so.40, which no package in the 24.04 base image provides, so libopenmpi3t64 was added (#1564); the FlagCX builder uses a self-contained 22.04 environment with the package name libopenmpi-dev, added separately (#1565). The same PR also noted that the 26.04 wheel hashes libmpi and libibverbs into the package, which is why the old builder never needed these two system libraries—direct evidence of a change in build assumptions between versions.
  • Compilation and communication layer: FlagTree adds a cp312 hcu builder and installs the DTK 26.10 SDK (#1562), with hcu-dtk2610 entering the wheel release targets (#1566); the FlagCX dtk2610 wheel line opens with flagcx==0.14.1+dtk2610 (#1563).
  • Operator side: FlagAttention removes the FP8 MSA path on Hygon and fixes test imports (#109); FlagTrain’s multi_tensor_adam lists Hygon as a first-class backend (#35); on the pending-review side, FlagCX has a Hygon bitcode build (#667) and FlagScale has DCU hardware health sampling (#1299).
  • Assessment: The value of the Hygon line is not new capability but completing container, builder, and wheel fixes within a single day for the “soname and interpreter version changes introduced by the new SDK,” while leaving a reusable troubleshooting path (the bodies of #1558 and #1565 are the record of that path).

3.2 Tsingmicro: Triton 3.6 Backend Synced and Dedicated Tag Cut (10-29)

Date: 2026-10-29　Sources: FlagTree PR #1459 · FlagTree tag · FlagTree PR #1468 · vllm-plugin-FL PR #642

  • What was merged: The Tsingmicro backend was synced with the internal Triton 3.6 development line (#1459, 27 files, +2264/−407), touching only the vendor subtree: restoring the per-launch precision API required for vendor operator dispatch (precision.py), the external CoreIR entry point and runtime adapter, fixing several Tx81 code-generation issues, and fixing CRT defects related to DMA, RDMA, WDMA, gather-scatter, and arithmetic.
  • Version action: At 11:09 the same day, a Tsingmicro 3.6 dedicated tag was cut, forming a contemporaneous sequence with the Moore Threads 3.6 tag from 10-26.
  • Pending review and ecosystem: vllm-plugin-FL’s pending #642 adapts Tsingmicro’s eager TXDA backend to vLLM 0.28.0; the Tsingmicro reference implementation on the FlagGems side saw several test fixture fixes on 10-29 (see 1.4).
  • Assessment: Tsingmicro is one of the few vendors that syncs its “internal development line” directly into an open-source backend. The cost is a large sync each time (27 files this round) and reviews that must be checked against vendor SDK semantics; the benefit is that the interface contracts between FlagGems and FlagTree can move forward in step with the vendor’s internal progress.

3.3 Kunlunxin: XPU3 foreach Fusion Chain and Constant-Grid Cleanup (10-29)

Date: 2026-10-29　Sources: FlagGems PR #7116 · FlagGems PR #7968 · FlagGems PR #7973 · FlagGems PR #7974 · FlagCX PR #678 · FlagGems-sglang PR #248

  • Fused kernels: The foreach family on XPU3 converged from “per-operator implementations” to a “List executor”—cos/exp/sin/addcdiv/lerp go through a unified executor (#7116), ceil goes through a maskless fused kernel (#7604), and tanh/expm1 go through in-place fused kernels (#7608).
  • Launch correctness: Four subsequent fixes focused on launch parameters—the 1-D paths of fmin and t_copy switched to constant launch grids (#7966, #7973), the scalar dtype branches of foreach were made mutually exclusive (#7974), and the list slot of foreach add is now derived from program_id(0) (#7968). These are not performance optimizations but correctness fixes for “the same operator picking the wrong slot under multiple branches.”
  • Interface surface: FlagCX adds an XPU device IR entry point for FlagTree to link against (#678); FlagGems-sglang’s fill_bonus_tokens adapts to the new tle.raw dialect API (#248).
  • Pending review: vllm-plugin-FL’s P800 adaptation on vLLM 0.28.0 (#585), sglang-plugin-FL’s Kunlunxin upgrade to 0.5.18 (#155), and a batch of P800 correctness issues on the FlagGems side.

3.4 MetaX: INT8 and FP8 Paths for Grouped GEMM, TP2 Decode Scheduling (10-29)

Date: 2026-10-29　Sources: FlagGems PR #6950 · FlagGems-vllm PR #1025 · FlagAttention PR #108 · FlagTree PR #1481 · FlagTree PR #1471

  • Grouped GEMM: grouped_mm_w8a8 now supports both INT8 and FP8 (#6950, 7 files, +1220 lines). The benchmark shapes come from real call replays collected from GLM-5.2 on PPU SGLang TP=8: two groups of shapes with 2.88M to 3.24M calls, totaling 26 unique geometries and 257 experts. The baseline is the vendor library’s ContinuousGroupedGEMM, with both sides receiving identical INT8 inputs, FP32 scales, and expert groupings.
  • Decode scheduling: On the FlagGems-vllm side, Split-KV scheduling and compute tile reordering for TP2 packed decode (#1025), targeting decode throughput under narrow tiles.
  • Attention: FlagAttention adds a Triton fused AttnRes forward on C550 (#108, 3 files, +268 lines), supporting FP16 and BF16, optional output RMSNorm and attention weights, fusing RMS scoring, online softmax, and residual aggregation without depending on TLE; at D=7168 and BF16, it goes from 0.075 ms at (2,1) to 1.496 ms at (9,8192); the author notes that FLA is unavailable, so no speedup ratio is claimed.
  • Compiler: FlagTree fixes the metadata check for CompiledKernel on Metax (#1481, corresponding to issue #1473); pending #1471 adds set_layout and automatic layout tuning to MetaX’s CommonIR.
  • Vendor side: MetaX’s official website published on 10-29 a recap of its CNCC 2026 sub-forum, “From Token Efficiency to Open-Source Collaboration: Toward the Next Decade of AI Infra,” which is conference-side content.

3.5 Moore Threads: TLE Persistent GEMM and SPMC Merged into Mainline (10-29)

Date: 2026-10-29　Sources: FlagTree PR #1294 · FlagGems-vllm PR #970 · FlagTree PR #1451 · vllm-plugin-FL PR #575

  • Compiler: The [MThreads][TLE] persistent GEMM pipeline and SPMC were merged into mainline (#1294, 63 files, +6192/−403), combining the two compiler sets previously serving addmm/baddbmm and bmm respectively into a single superset. Capabilities include stage and phase advancement in dynamic loops, one-producer-multiple-consumer, named and implicit reads, segmented and grouped completion, consumer epoch derivation, and single-issue, fused-consumer, and 16-warp persistent paths. The PR body explicitly states that this round covers only the compiler, frontend, and tests, not FlagGems operator code.
  • Inference: On the FlagGems-vllm side, MUSA’s FP8 variable-length attention was retuned for the current CI compiler (#970).
  • Pending review: FlagTree’s #1451 aligns WGMMA warp selection with upstream MMAv3; vllm-plugin-FL’s #575 adapts MUSA to vLLM 0.28.0; a MUSA short-shape fallback branch (FlagFFT’s codex/musa-shortfall) is progressing on a feature branch.
  • Assessment: Moore Threads’ investment is concentrated on the compiler side rather than operator count—persistent GEMM and SPMC are prerequisites for backbone operators like addmm/bmm to reach usable performance on MUSA, and this capability is also reused by the TLE lines for Ascend and MetaX.

3.6 Enflame, Ascend, DAMO XuanTie: Four Lines of Attention and Normalization Operators (10-29)

Date: 2026-10-29　Sources: FlagAttention PR #104 · FlagAttention PR #106 · FlagAttention PR #116 · FlagAttention PR #103 · FlagGems PR #6586 · Torch-FL PR #683 · FlagGems-vllm PR #888

  • Enflame: Three PRs merged the same day on FlagAttention—prefill and decode optimizations for MiniMax M3 sparse attention (#104, 2 files, +2873/−2516), chunk KDA operator optimization (#106), and a fused attention residual operator (#116); on the FlagTree side, Enflame CI was added (#1468) along with TLE unit tests (#1470), and pending #1405 fixes swiglu precision error.
  • Ascend: A new three-stage Parallax attention implementation (prefill, decode, kvcache, #103, 10 files, +2738 lines), covering causal masking, sliding window, GQA, and variable-length inputs, delivering 1.0× to 8.74× speedups over FLA on most training shapes; FlagGems fixes cat (#7989) and the log_ grid-fill rerun (#6586, backported from 5.4.0-rc2); FlagGems-vllm lands fused_q_kv_rmsnorm on Ascend (#872) and renames lightning-indexer’s custom operator to tle_raw.call (#944); Torch-FL makes Ascend honor FP32 matmul precision and keep gradients resident (#683).
  • DAMO XuanTie: fused_q_kv_rmsnorm also lands on the DAMO XuanTie platform (#888, merged at 17:07); on the PPU side, 10-29 also saw FlagTrain’s multi_tensor_adam full-backend support (#35, with PPU as a first-class backend), plus a pending PPU GLA optimization (FlagAttention #117 is for Hygon; PPU has a separate branch); the MiniCPM-OCR Day0 adaptation pushes DAMO XuanTie throughput to 98.7% of native NVIDIA (see 2.1).
  • Assessment: The three vendors each took a different attention path on the same day—Enflame on sparse and KDA, Ascend on Parallax and fused RMSNorm, DAMO XuanTie on fused RMSNorm and edge decode. Fragmentation at the attention layer continues to worsen, and no unified cross-vendor lower-layer implementation has yet emerged.

3.7 Iluvatar CoreX: Tiangai 300’s First Live Demo, Claims 1.05× H200 Single-Card Throughput (10-28)

Date: 2026-10-28 (demo) / 2026-10-29 (reporting)　Sources: Pandaily report · SCMP report · FlagCX PR #681 · sglang-plugin-FL PR #139

  • Demo facts: Iluvatar CoreX publicly demonstrated the Tiangai 300 general-purpose GPU live for the first time at a Shanghai media open day on 10-28. Previously, the company’s public materials on this chip were mainly architecture and roadmaps, with no runnable system.
  • Claims and caveats: The company says the Tiangai 300 is the first domestic general-purpose GPU whose measured performance reaches NVIDIA H200 levels, with third-party testing converting to 1.05× H200 single-card overall throughput, and surpassing H200 on complex multimodal tasks such as text-to-image and text-to-video. This figure is the company’s own claim; the test methodology, models used, and workload conditions were not disclosed and cannot be verified.
  • Stack-side counterparts: FlagCX added Device API acquire semantics for Iluvatar CoreX the same day (#681, see 1.6); sglang-plugin-FL’s pending #139 adapts Iluvatar CoreX to SGLang 0.5.18’s Empty runtime; FlagTrain’s multi_tensor_adam already lists Iluvatar CoreX as a supported backend (#35).
  • Assessment: Hardware claims and software stack adaptation move on two different cadences—the former can be completed with a single launch event, while the latter must be filled in from Device API memory ordering all the way to inference framework runtime adaptation. What this window shows is the latter being continuously filled in, while the former’s numbers still lack verifiable conditions.

IV. Summary and Trend Observations

  • The cost of hardware generational switching is concentrated on the build side: none of the eight merged DTK 26.10 changes touched the kernel; all were container paths, interpreter versions, runner overrides, and soname dependencies. Python 3.12 and torch 2.13.0+dtk2610 invalidated the entire existing cp310 builder, and between 26.04 and 26.10, libmpi and libibverbs shifted from “hashed into the wheel” to “linked at runtime”—changes of this kind can only be discovered through node-by-node testing.
  • The Day0 model narrative shifts toward comparable numbers: the MiniCPM-OCR adaptation notes give the actual throughput ratio (98.7%), the throughput ratio normalized to peak (169.3%), and edge-side latency (1.2 seconds on M5, median 895 ms), each with its stated preconditions. This is the first recent material from this stack to state “catching up to native” and “higher utilization” separately, which is more informative than a single multiplier.
  • Test infrastructure becomes an independent mainline: ref-as-candidate landed in both the FlagGems and FlagGems-sglang repos, paired with 57 test fixes the same day and the daily automated sync of kernelgen-dev; testing has shifted from “is the operator there” to “do the reference and the implementation agree.” The output of this line does not show up in operator counts, but it determines the credibility of all subsequent backend alignment.
  • The quantum line is self-contained: 60 commits in one day on FlagQuantum systematically archived the circuit synthesis specifications and delivery documents for CS-01 through CS-07, while FlagQAI built the local workbench in parallel. It is unrelated to multi-chip adaptation and is the only software-stack mainline in the 2.x cycle that is decoupled from hardware.
  • Three points to watch: first, the release/2.3 manifest in the community repo has not yet been established while the build side is already accounting against 2.3.0—will the release notes be filled in; second, neither FlagCX v0.14.1 nor FlagTree’s vendor-split 3.6 tags have Release bodies, so downstream can only infer content from tag names; third, Megatron-LM-FL’s DeepSeek-V4 upstream sync has opened [1/N] and [2/N]—will this training stack, stalled for two weeks, truly resume pushing.

Source Verification Table

Source Verification Result
Full GitHub org (61 repos) 21 repos pushed within the window; 16 repos had commits; 5 repos verified via atomic supplementary checks (1 repo had commits, 1 repo was gh-pages, 1 repo was a feature branch, 2 repos were PR branches and issue activity)
Commit search 189 commits; FlagQuantum 60 and FlagGems 43 were the two largest
Merged PR search 183 PRs; FlagGems 92, build-infra 16, FlagQuantum 15
Open PR search 253 updated, 84 newly opened; the ten Megatron-LM-FL PRs were the first large-scale update in nearly two weeks
Release / Tag atomic verification 31 repos; 1 new tag within the window (FlagTree Tsingmicro 3.6 dedicated tag, no release body); FlagCX v0.14.1 archive time updated to 10-29 10:55
org event stream 100 events: 34 PR review comments, 34 PR events, 13 pushes, 9 issue comments, 8 branch creations, 1 branch deletion, 1 fork
Google News RSS (24 groups, Chinese and English) 30 hits, 1 valid (a HuiXi Intelligence conference-attendance piece, pointing to the 10-17 to 10-18 conference; a post-conference dissemination piece, not listed separately)
HN Algolia (8 groups) 6 to 30 hits in the 4-day window, 0 with titles and bodies directly matching
CSDN FlagOS column 1 new article (MiniCPM-OCR Day0, 10-29 11:19), 1 livestream (10-29 19:00); three highly relevant older pieces verified to be from late August and not counted
BAAI Hub No software-stack entries within the window on the homepage; the search page is client-rendered and the list could not be scraped
Member company websites (8) MetaX had one meeting recap on 10-29; Moore Threads’ latest was an earnings infographic on 10-28; Iluvatar, Hygon, Cambricon, Enflame, and Tsingmicro had no new entries; Horizon scraping failed

Complete Source List