FlagOS Daily Intelligence Report (2026-10-27)
Research window: 2026-10-26 06:00 ~ 2026-10-27 06:00 (Beijing time, 24 hours; Tuesday morning report, window continues from the previous daily report’s cutoff).
Sources: GitHub (full audit of 61 repos under org: flagos-ai, 185 commit searches, 133 merged PRs and 225 open PRs searched, 100 org event stream entries, atomic audit of Releases/Tags across 31 repos, Atom fallback for 2 repos, review of key PR bodies and file sizes), Google News RSS (24 sets of Chinese and English query terms, via proxy), HN Algolia (8 sets), CSDN FlagOS column, BAAI Community (see appendix source list for details).
Index
- Today’s highlights: 2.3.0 runtime enters application rebuild; XuanTie BLAS1 batch lands in full; FlagCV makes its first public positioning (10-26)
- I. Open-source project progress (GitHub activity)
- 1.1 Org cadence: 18 repos pushed, 185 commits, 133 merged; open backlog rises to 225 (10-26 ~ 10-27)
- 1.2 Runtime 2.3.0: vllm app receives rebuild authorization, unified tags finalized, new AMD ROCm 7.2.4 base image added (10-26)
- 1.3 DAMO XuanTie: FlagBLAS fills in 15 groups of BLAS1 operators in one pass, 16,000 lines land (10-26)
- 1.4 FlagGems: 49 merges; KernelGen operator batches and Kunlunxin XPU3 fusion acceleration proceed in parallel (10-26)
- 1.5 FlagQuantum: 109 commits, 47 merges; Quafu SDK switchover wraps up with fixed-shots contract (10-26)
- 1.6 FlagCV: first positioning statement merged; Triton vision operator library takes shape publicly (10-26)
- 1.7 FlagTrain: KMCompiler branch extended to seven backends, five under review (10-26)
- 1.8 Other repos: FlagTree adds MThreads-specific tags; optest merges thirteen vendor check scripts (10-26)
- II. News coverage and ecosystem
- 2.1 Tsingmicro: Open3D-PIMC goes from open-source debut to teacher-training classrooms in thirty countries (10-26)
- 2.2 MetaX: RLinf full-stack adaptation merged into official mainline; thousand-card SFT-to-RL post-training validation completed (10-26)
- 2.3 Channel audit: 12 candidates, 2 valid; no new hits on CSDN column or HN (10-27)
- III. Deep dive on member units and backend vendors
- 3.1 DAMO XuanTie: BLAS1 batch lands; XuanTie branch of fp8 GEMM still under review (10-26)
- 3.2 Kunlunxin: three foreach fusions, in-place GEMM, and bitcode build on the XPU3 side (10-26)
- 3.3 MetaX: SGLang plugin adds full MetaX backend package; three model adaptations under review on the vLLM side (10-26)
- 3.4 Tsingmicro: TXDA backend upgraded with vLLM 0.28.0; FlagCX packaging incorporates Tsingmicro (10-26)
- 3.5 Enflame, Hygon, Iluvatar, Moore Threads: one structural change each across four backends (10-26)
- IV. Summary and trend observations
- Appendix: Source audit table and complete source list
Today’s Focus: 2.3.0 Runtime Enters Application Rebuild; XuanTie BLAS1 Lands as a Full Batch; FlagCV Positioned Publicly for the First Time (10-26)
Date: 2026-10-26 ~ 2026-10-27 Sources: build-infra PR #1488 · FlagBLAS PR #154 · FlagCV · FlagGems PR #7688 (see appendix for full list)
- Version side: At 20:10 on 10-26, build-infra authorized rebuilding twenty vllm0.24.0 application images on the 2.3.0 runtime, then consolidated the tags from “suffix by backend” into the unified tag 2.3.0-0.3.0. At 23:05 the same day, an AMD ROCm 7.2.4 base image was added, with the backend key amd-rocm7.2.4; it was rehearsed successfully inside a clean ubuntu:24.04 container, and passthrough of eight W7900 cards was verified using a local gfx1100 image. 2.3.0 has moved from “runtime refreshed” to “application layer starting to follow the version,” though the tag itself has still not been cut.
- Operator side: FlagBLAS merged DAMO XuanTie’s L1 support, filling in fifteen groups of basic linear algebra operators in one pass: AMAX, AMIN, ASUM, AXPY, COPY, DOT, DOTC, DOTU, NRM2, ROT, ROTG, ROTM, ROTMG, SCAL, and SWAP, touching 17 files with 16,168 lines added. This PR was still under review in the previous daily briefing; it was merged within this window, marking a step for XuanTie in the backend matrix from “can run inference” toward “completing the numerical library.”
- Direction side: FlagCV merged its first About description, positioning the repository as “a high-performance computer vision library implemented in Triton”—exposing OpenCV-shaped image processing primitive interfaces (color conversion, filtering, geometric transforms, arithmetic operations), benchmarking against OpenCV’s CUDA baseline, built on top of FlagTree, with pluggable backends. This is the organization’s first clear articulation of the repository in the vision direction; previously, when the repo was created on 10-14 and the skeleton landed on 10-18, there was only placeholder code.
- Ecosystem side: MetaX announced that the full-stack adaptation of the reinforcement learning framework RLinf for embodied intelligence has been merged into its official mainline, completing two tiers of SFT at 512 cards and 1024 cards based on Xiyun C-series GPUs, as well as multi-scenario RL post-training validation; task success rates across four groups matched or exceeded the values reported in the paper, with one group 8.8 percentage points higher, and multi-machine scaling linearity remained above 97%. This is not a FlagOS component release, but it shares the same origin as its “upstream first” approach.
- Rhythm side: In the 24-hour window, 18 repos pushed, 185 commits, 133 merges, 225 under review (74 newly opened). Compared with the previous 24-hour window (10-22: 16 repos, 135 commits, 163 merges, 183 under review, 90 newly opened), commits rose 37% and items under review rose 23%, while merges and newly opened items each fell 18%—development is accumulating while review throughput is declining.
- Assessment: This issue has no new version release and no model Day-0 simultaneous launch; the content focus returns to “filling in the backends”: XuanTie completing the numerical library, AMD adding a base image, SpacemiT and MetaX completing inference plugin backends, and Kunlunxin completing bitcode and fused operators. This kind of work doesn’t make headlines, but it determines whether 2.3 can be rolled out to each vendor with unified images. The observation point for 2.3.0 remains whether the tag and the all-backend changelog are completed in sync.
I. Open-Source Project Progress (GitHub Activity)
1.1 Organizational Pace: 18 Repos Pushed, 185 Commits, 133 Merges, Review Backlog Rises to 225 (10-26 ~ 10-27)
Date: 2026-10-26 ~ 2026-10-27 Source: flagos-ai org repositories · Commit search · Merged PR search
- Repo coverage: 18 of 61 repos had pushes in the window, the most in the past week. By commit count: FlagQuantum 109, FlagGems 28, FlagGems-sglang 14, FlagSparse 7, FlagGems-vllm 5, Torch-FL 5, build-infra 5, vllm-plugin-FL 2, FlagTrain 2, FlagCV 2, with FlagBLAS, sglang-plugin-FL, optest, FlagCX, FlagPrism, and FlagTree at 1 each.
- Merges: 133 PRs merged, split as FlagGems 49, FlagQuantum 47, FlagGems-sglang 6, Torch-FL 5, build-infra 5, FlagGems-vllm 5, FlagTree 4, sglang-plugin-FL 2, vllm-plugin-FL 2, FlagTrain 2, with FlagCV, FlagSparse, FlagBLAS, FlagCX, FlagPrism, and optest at 1 each.
- Review backlog: 225 open PRs updated in the window, of which 74 were newly opened; new opens split as FlagGems 36, FlagTree 8, FlagQuantum 7, vllm-plugin-FL 5, FlagTrain 4, with FlagGems-vllm, FlagAttention, and FlagGems-sglang at 3 each.
- Daily comparison: Over the 24-hour window, 185 commits (135 in the prior 24-hour window, up 37%), 133 merges (163, down 18%), 225 in review (183, up 23%), 74 newly opened (90, down 18%), 18 repos pushed (16).
- Releases: Atomic check of Releases and Tags across 31 repos found only FlagTree adding one tag, 0.7.1a1+mthreads3.6 (10-26 10:13), with no corresponding Release entry in the releases list—a pure Tag event; all other repos had zero additions.
- Events: 100 org events: 49 PR events, 20 pushes, 10 branch creations, 7 branch deletions, 3 reviews, 9 comments, 1 follow, 1 Issue.
- Assessment: Commits up, merges down, review backlog up—all three moving in the same direction indicates the queue is accumulating rather than clearing. The backlog comes mainly from FlagGems (49 merges alongside 52 in review) and FlagTree (4 merges, 9 in review)—both repos are preparing for the 2.3 compiler and operator release, and review bandwidth is the current bottleneck.
1.2 Runtime 2.3.0: vllm Apps Get Rebuild Authorization, Unified Tag Settled, AMD ROCm 7.2.4 Base Image Added (10-26)
Date: 2026-10-26 Source: build-infra PR #1488 · PR #1504 · PR #1502 · PR #1505
- Rebuild authorization (#1488): Added pending-release changelog entries (with reason, date left blank) for twenty vllm0.24.0 apps, satisfying the changelog gate at push time before app images can be rebuilt. The reason: the runtime was refreshed to the 2.3.0 stack on 10-25, making all app images built on top of it stale. The entries document item by item what the app images now carry: the runtime’s two container startup parameters, flagcx 0.14.0 pinned per backend, and the venv prefix.
- Tag convergence: A second commit in the same PR moved native plugin tags out of the image tag, delegating them to a unified resolver, which makes the backend-suffix-free unified tag 2.3.0-0.3.0 valid; a third commit declared in the changelog and schema header that the reason field is published as markdown, so multiple changes can be read as a list.
- New backend (#1504): AMD ROCm 7.2.4 base image landed, backend key amd-rocm7.2.4, built on Ubuntu 24.04 with ROCm 7.2.4 installed directly from repo.radeon.com rather than a file repo. Only 28 lean packages installed, totaling 94 after apt resolves runtime dependencies; MIOpen, MIGraphX, rocm-gdb, rocprofiler-sdk, and opencl explicitly excluded. Dry runs surfaced two facts that had to be written into the Containerfile: amd nodes cannot reach archive.ubuntu.com, so the Alibaba Cloud HTTP mirror must be switched in before ca-certificates exists (HTTPS handshakes fail); and the pin file is a requirement, not a version preference.
- Two unblocking fixes: #1502 at 22:27 made the native plugin gate run within the same interpreter; #1503 at 22:45 removed the vllm plugin tag from sglang’s docs page; #1505 changed output to print the plugin pin the tag actually carries rather than the backend tag.
- Assessment: This round’s actions all target “releasability”—gates, audit trails, tag shape, base images. Taken together with the 10-25 runtime rebuild authorization, the 2.3.0 pipeline has now run end to end once; only formal tagging and a batch rebuild of all-backend images remain. The new AMD backend means the backend matrix is still expanding in the 2.3 cycle, not converging.
1.3 DAMO XuanTie: FlagBLAS Adds 15 BLAS1 Operator Groups in One Pass, 16,000+ Lines Committed (10-26)
Date: 2026-10-26 Source: FlagBLAS PR #154 · FlagBLAS commits
- Scale: A single PR touching 17 files, adding 16,168 lines and deleting 9, merged at 10-26 08:57—the largest change among non-quantum repos that day.
- Coverage: Fifteen BLAS Level-1 operator groups added in one pass—vector max/min and sum (AMAX, AMIN, ASUM), vector accumulation and copy (AXPY, COPY), three dot-product variants (DOT, DOTC, DOTU), Euclidean norm (NRM2), four plane rotation variants (ROT, ROTG, ROTM, ROTMG), and vector scaling and swap (SCAL, SWAP).
- Layer: This fills in the numerical library layer, not inference operators. BLAS1 is a prerequisite for the higher-level BLAS2 and BLAS3 as well as LAPACK solvers; without this layer, the stack cannot be self-consistent bottom-up. For XuanTie, its prior presence in FlagOS was concentrated on the inference path (Zhenwu Express edition, sparse attention), leaving the numerical library as a gap.
- Pipeline: This PR was still listed as in review in the previous daily report; it merged within this window, crossing from “in review” to “committed” over one window.
- Assessment: A backend’s maturity in FlagOS is typically measured in three stages: can run inference, can run training, numerical library self-consistent. XuanTie crossed the first step of the third stage this window; next to watch is whether BLAS2 and BLAS3 follow, and whether the FP8 path (the XuanTie branch of the fp8 GEMM in review on the FlagTrain side) can share the same numerical library.
1.4 FlagGems: 49 Merges, KernelGen Operator Batches and Kunlunxin XPU3 Fusion Speedups in Parallel (10-26)
Date: 2026-10-26 Source: FlagGems commits · PR #7676 · PR #7635 · PR #7669
- Totals: 28 commits, 49 merges—second in commits org-wide, first in merges. Merges exceed the commit search count due to differences in how merge commits and squashed commits are counted; merges are authoritative.
- KernelGen batches: 16 operator merges prefixed KernelGen plus Nvidia, concentrated in three periods—10:41 to 10:43, 18:17 to 18:20, and 23:05 to 23:06: sparse and structured-related (_sparse_semi_structured_tile, _sparse_mm_reduce_impl, sparse_compressed_tensor), quantization-related (choose_qparams_per_tensor, make_per_tensor_quantized_tensor), special functions (special_psi, special_scaled_modified_bessel_k0), tensor metadata (_version, _nested_compute_contiguous_strides_offsets, ravel, new_zeros), plus one acceptance speedup for the _foreach operator family.
- Kunlunxin speedups: Five XPU3-side changes—addmm_ writes GEMM directly into the in-place target (#7676), less_equal switched to a NaN-safe comparison (#7688), isfinite kernel optimization (#7631), and three foreach changes (ternary scalar fusion, div via a faster List kernel, log fusion dropping the mask). This group is typical backend tuning: small changes, localized gains.
- Bug fixes: FP8 TopK TLE scatter addressing fixed on the QC side (#7669); logical_and and a registration error fixed on the Kunlunxin side (#7666, #7670).
- Test side: The same contributor batch-merged twenty-plus test contract fixes (candidate entry points, native reference injection, overload selection, foreach precondition failures), pulling many “the test itself is broken” cases out of the failure set.
- Assessment: Operator supply is still dominated by KernelGen auto-generated batches, with human intervention mainly on backend tuning and test contracts. The quality risk this structure implies is not “operators written wrong” but “test coverage that looks complete while reference implementations are missing”—the twenty-plus test fixes this window make that risk explicit.
1.5 FlagQuantum: 109 Commits, 47 Merges, Quafu SDK Switch Wraps Up and Fixed-shots Contract (10-26)
Date: 2026-10-26 Source: FlagQuantum commits · PR #874 · PR #919 · PR #924
- Totals: 109 commits, 47 merges—58.9% of org commits and 35.3% of merges, still the most active repo, though the daily rate has fallen to about one-third of the prior period (505 commits over 72 hours).
- Quafu switch wrap-up: Completed the read-only SDK switch (#874), converged dynamic mocks onto the Quafu SDK (#880), proposed dynamic format activation and provenance auditing (#881, #883), and rerouted all remote-execution mocks on the examples side. This is the closing segment of the prior period’s “full lifecycle switch.”
- Rydberg track: Seeded presence plan execution (#879), evolution of the selected Rydberg branch (#875), acceptance records committed to docs (#882)—moving from contract to runnable path.
- Quantum error correction (QEC): Fixed-shots experiment design and contract drafts merged in sequence (#912, #924), channel construction template reuse speedup (#877), native-stage handoff and independent failure loop audit trail (#917), AI decoding delivery progress aligned twice (#890, #895).
- API and examples: iSWAP gate pair added (#919), Circuit and DynamicCircuit gate chains changed to a typed fluent interface (#913), gate coverage Batch A proposal (#915), absorptive photon-counting example with acceptance (#921), spin-mode model fitting example in a fixed thermal bath (#897), Twin candidates and human-gated evolution cycle (#923, #926).
- Assessment: The quantum stack’s rhythm has shifted from “structural reorganization” to “physics scenario rollout”—QEC, neutral atoms, and thermal bath advancing in parallel, each documented in four stages: design draft, contract draft, runnable example, acceptance record. This way of working is costly but highly auditable, and explains why it consistently accounts for most of the commit volume.
1.6 FlagCV: First Positioning Statement Merged, Triton Vision Operator Library Takes Shape (10-26)
Date: 2026-10-26 Source: FlagCV · FlagCV PR #2
- Positioning: FlagCV describes itself as “a high-performance computer vision library implemented in Triton,” offering common image-processing primitives under an OpenCV-shaped interface—color conversion, filtering, geometric transforms, arithmetic operations—benchmarked against OpenCV’s CUDA baseline, targeting reference-grade correctness and competitive performance across multiple GPU architectures.
- Dependencies: Built on FlagTree (the FlagOS-maintained Triton fork supporting multiple hardware backends), exposing a vendor-agnostic operator interface with pluggable backends.
- Timeline: The repo was created on 10-14 (placeholder only), got its skeleton on 10-18 with operator implementations removed in favor of an “immediate-mode skeleton,” and merged the About and README descriptions on 10-26. In other words, the code skeleton came first and the positioning statement later; this window filled in “what this repo actually does.”
- Assessment: Vision was previously the thinnest piece of the FlagOS system—FlagDNN, FlagSparse, FlagFFT, and FlagBLAS existed, but no image-processing primitive layer. FlagCV attaches vision to FlagTree rather than standing up a separate compiler, consistent with “develop once, run on many chips”; the real test will be how memory-bound operators like color conversion and geometric transforms perform on non-GPU backends (NPU, DSA), for which no performance data exists yet.
1.7 FlagTrain: KMCompiler Branch Spreads to Seven Backends, Five in Review (10-26)
Date: 2026-10-26 Source: FlagTrain PR #29 · PR #30 · PR #35 · PR #18
- Two merges: #29 adds a Triton implementation of fused_indices_to_multihot covering Nvidia and Ascend, with benchmark records on H20; #30 ports over FlagGems-vllm’s baseline comparison mechanism, normalizing speed ratios by the peak scaling factor of the device’s bottleneck unit, outputting a “vs Base” column, recording the reason rather than failing when a baseline is missing, and adding a lamb baseline plus a per-operator summary tool.
- Five in review: #34 tanh_soft_clamp (Nvidia, Ascend, Hygon, XuanTie, MetaX, Iluvatar), #35 multi_tensor_adam (Nvidia, Hygon, MetaX, Horizon PPU, Iluvatar), #18 fp8_gemm (Nvidia, Ascend, XuanTie, MetaX), #10 mixed_gemm (Nvidia), #28 fused_proj_rms_compute_h_fwd (Nvidia).
- Structural trait: Listing the backend roster directly in a single PR’s title is the standard style for this FlagTrain branch—one operator spread across the backend matrix at once rather than submitted backend by backend. Seven backends (Nvidia, Ascend, Hygon, XuanTie, MetaX, Iluvatar, Horizon) appear in the same batch of PRs.
- Assessment: FlagTrain has clearly accelerated in the 2.3 cycle, concentrated on three operator categories on the training side: optimizers, MoE, and quantized GEMM. It divides labor with FlagGems (inference operators); both use KernelGen to generate Triton implementations and then fill in per backend. The difference is that FlagTrain depends more on cross-backend consistency, so its PR acceptance bar is higher—five in review at once is no surprise.
1.8 Other Repos: FlagTree Tags an MThreads-Specific Build, optest Merges Thirteen Vendor Check Scripts (10-26)
Date: 2026-10-26 Source: FlagTree tags · FlagTree PR #1410 · optest PR #11 · FlagGems-sglang PR #227
- FlagTree: Tagged 0.7.1a1+mthreads3.6 at 10-26 10:13, pointing to an MThreads-specific build on the 0.7.x line, with no corresponding Release entry in the releases list—a pure Tag event; the substantive backend change came from #1416 on 10-23 (MTHREADS backend tracking the upstream commit). Four merges in the window: FlagMega re-infers the slice type for the Qwen3 vLLM profile (#1373), HCU backend supports set_layout (#1410), ROCm loads source-rdata via the HIP host registration interface (#1403), and pooled ABI bank row indices passed by tl value (#1404).
- optest: Merged a consolidation of thirteen vendor-separated GPU check scripts into a single flagos-gpu-check command (#11), auto-detecting in the order “vendor-proprietary device nodes first, SMI commands as secondary confirmation,” while preserving each vendor’s per-card table, timeout, and retry parameters; vendor conflict rules state “Hygon before AMD (both have kfd, only Hygon has mkfd)” and “XuanTie before Nvidia.”
- FlagGems-sglang: 6 merges, including two competition-track operators (add3,
create_chunked_prefix_cache_kv_indices), a batch of batch8 operators, two removals of crashing grouped kernels, and a fix for reading device info at import time; #227 adds 16 operators missing from the registry to operators.yaml. - FlagSparse, FlagPrism, FlagCX: FlagSparse had 7 commits and merged a full batch of optimizations from an external organization (#114); FlagPrism merged Enflame-side tops headers and library dependency resolution (#17, 2,126 lines); FlagCX merged Kunlunxin XPU device bitcode builds (#676).
- Assessment: The most notable item in this group is the optest consolidation—test infrastructure going from “one script per vendor” to “one auto-detecting command” is an inevitable step once multi-backend scale arrives. The two conflict rules in the vendor ordering (Hygon vs. AMD, XuanTie vs. Nvidia) show that device detection in heterogeneous environments can no longer rely on a single signal.
II. News Coverage and Ecosystem
2.1 Tsingmicro: Open3D-PIMC Goes from Open-Source Debut to a Teacher-Training Classroom in Thirty Countries (10-26)
Date: 2026-10-26 Source: JRJ (reposted by Sohu): From Tech Conference to Classrooms in 30 Countries · Xinhua: Open3D-PIMC Fills a Key Gap in the Domestic Computing Software Ecosystem
- Project: Open3D-PIMC, jointly developed by Tsingmicro and the Beijing Academy of Artificial Intelligence (BAAI), is a programming model and open-source software framework for 3D computing chips. It was officially open-sourced at the China Computing Conference in September and is positioned as one of the main Zhongzhi FlagOS solutions for next-generation 3D chips.
- Technical approach: Developers describe only data distribution and task partitioning; the framework automatically handles the split and invocation of graph compilation and just-in-time execution, thereby adapting models to the hardware. It is built on mainstream ecosystems such as PyTorch, and on the inference side natively integrates with vLLM and SGLang. Highly dynamic operators such as Flash Decoding and MoE retain hand-written optimization entry points. Vendors’ proprietary instruction sets and microarchitecture capabilities are plugged in as plugins.
- Hardware background: Tsingmicro’s second-generation high-performance cloud AI chip uses 3D memory-compute integration and multi-chiplet packaging to stack memory and compute vertically, cutting data movement distance from millimeters to micrometers and turning latency from the non-deterministic, conflict-prone behavior of centralized architectures into predictable, deterministic behavior at the near-memory side.
- This period’s progress: The 10-26 report focuses on ecosystem outreach rather than code—the global “AI Open Computing Teacher Development Program” puts Tsingmicro engineers into the classroom, with nearly 50 leading university teachers from more than 30 countries as participants (over 20 from Africa, more than 10 from Asia, and the rest from Europe and South America).
- Note on figures: The statement that “FlagOS has adapted 20 chip vendors and more than 30 AI chips” reflects the reporting outlet’s wording and is not fully consistent with the official figures of 21 vendors and 35 chips given at the October Open Computing Conference. When citing, it is best to attribute the former to the report and the latter to the conference.
- Assessment: The value of this story is not “yet another open-source release” but that it demonstrates a new path for the FlagOS ecosystem—first a member organization takes the lead in building a programming model for a new hardware form factor (3D stacking), then plugs it into FlagOS as a solution. Compared with “Day-0 model adaptation,” this is another kind of expansion: “hardware form factor first.”
2.2 MetaX: Full-Stack RLinf Adaptation Merged into the Official Mainline; Thousand-Card Run Completes SFT-to-RL Post-Training Validation (10-26)
Date: 2026-10-26 Source: Tonghuashun Finance reposting MetaX’s official WeChat account · MetaX official news center
- Event: MetaX completed a full-stack adaptation for RLinf, a large-scale reinforcement learning framework for embodied intelligence. The adaptation has been merged into RLinf’s official mainline, so developers can run RLinf training tasks on MetaX GPUs without changing code.
- Framework background: RLinf was launched by Tsinghua University and Infinigence AI, together with institutions including Beijing Zhongguancun Academy. It is positioned as the first large-scale reinforcement learning framework for embodied intelligence that integrates simulation, training, and inference, and its results have been accepted at conferences including OSDI, RSS, and NeurIPS.
- Validation scale: On Xiyun C-series GPU clusters, two tiers of SFT were completed—512 cards and 1,024 cards (128 nodes × 8 cards)—training the Pi0.5 model on the RoboTwin dataset. Success rates on all four task groups matched or exceeded the values reported in the paper, with one group 8.8 percentage points higher; multi-node scaling linearity remained above 97%.
- Integration approach: Four layers of alignment in plugin mode—a new device manager added to the accelerator abstraction layer and registered in the RLinf registry; environment variables to control multi-card visibility and coordinate with Ray scheduling; communication defaulting to MetaX’s collective communication library MCCL; and a software stack based on MXMACA’s PyTorch and FlashAttention supporting BF16 and FSDP.
- Roadmap note: MetaX describes this as a continuation of its “upstream first” strategy, following earlier merges into the official mainlines of LMCache and ms-swift.
- Assessment: This is not a FlagOS component release and should be recorded as an open-source ecosystem move by a member organization. What is noteworthy is the direction—the reinforcement learning training stack for embodied intelligence overlaps in scenario with FlagOS-Robo and the FlagScale training tools on the FlagOS side. Whether a relay pattern emerges in which “member organizations first merge into upstream frameworks, and FlagOS then consolidates a unified backend” is a thread worth following.
2.3 Channel Check: 12 Candidates, 2 Valid; No New Hits on the CSDN Column or HN (10-27)
Date: 2026-10-27 Source: Google News RSS · CSDN FlagOS column · HN Algolia
- News side: Across 24 Chinese and English query terms, 12 candidates appeared within the window, 2 of them valid (Tsingmicro Open3D-PIMC, MetaX RLinf). Queries for component names (FlagOS, FlagGems, FlagScale, FlagTree, FlagPerf, FlagCX, KernelGen) all returned zero hits, consistent with the norm over the past two weeks.
- Exclusion details: Four Enflame-related items were margin-trading, morning-briefing, and listing-retrospective pieces (the company actually listed on the STAR Market on September 11; the 10-26 “listed today” headline is a reposted article and was not used); one Moore Threads item was about share price and trading volume; two BAAI and Beijing Daily GEOInflow items concerned a media technology partnership and are unrelated to FlagOS; and one panoramic review of domestic computing vendors was an industry roundup.
- HN side: Eight queries (FlagOS, FlagGems, FlagScale, FlagTree, BAAI, FlagQuantum, FlagSparse, flagos-ai) returned 34 hits within a 4-day window, with no direct title matches.
- CSDN side: The column page had 51 article links; the latest news piece is still from late August (GLM-5.3-Flash on nine chips, Qwen3.8-Flash-Next on eight chips, LightX2V integration). The only new date within the window is a 10-22 university roundtable livestream page, with no new articles.
- BAAI community: The search page is client-rendered and returned only the framework page, so it was not used this period.
- Assessment: For the third consecutive window, the news side contains only member-organization press releases. FlagOS’s own external communications cadence is clearly out of sync with its code cadence—the code is filling in backends, while publicity is waiting for the next model or version milestone.
III. Deep Dive into Member Units and Backend Vendors
3.1 DAMO XuanTie: Full BLAS1 Batch Merged, XuanTie Branch of fp8 GEMM Still Under Review (10-26)
Date: 2026-10-26 Source: FlagBLAS PR #154 · FlagTrain PR #18 · optest PR #11
- FlagBLAS: Fifteen groups of BLAS1 operators merged in a single commit — 17 files, 16,168 lines — marking XuanTie’s first full-fledged contribution at the FlagOS numerical library layer.
- FlagTrain: The fp8_gemm under review covers four vendors — NVIDIA, Ascend, XuanTie, and MetaX — with XuanTie the only RISC-V vector path among them; the tanh_soft_clamp also under review in the same batch includes XuanTie.
- Test infrastructure: optest’s vendor conflict rules place XuanTie ahead of NVIDIA on the grounds that their device node probing may collide; the rule itself confirms XuanTie is already in CI’s real machine pool.
- Background: In the 10-23 to 10-25 window, XuanTie completed delivery of the Zhenwu Express edition and had PPU sparse attention under review; this window shifts to the numerical library.
- Assessment: XuanTie’s activity in FlagOS has held a “one full block per window” cadence for three consecutive windows — inference, attention, numerical library. Next to watch: BLAS2 and BLAS3, and whether the CPU side (optest’s thead vendor key) shares the same check scripts as the accelerator card side.
3.2 Kunlunxin: Three foreach Fusions, In-Place GEMM, and Bitcode Build on the XPU3 Side (10-26)
Date: 2026-10-26 Source: FlagGems PR #7676 · PR #7635 · FlagCX PR #676 · FlagCX PR #677
- Operator side: Six changes on XPU3 — addmm_ writes GEMM directly into the in-place target, eliminating one intermediate hop; less_equal uses NaN-safe compare-exchange operands; isfinite kernel optimization; and three foreach fusions (ternary scalar, div’s List kernel, log mask removal).
- Communication side: FlagCX merged Kunlunxin XPU device bitcode build (#676) — a Makefile compiles the shared device API wrappers into xpu3 LLVM bitcode, extracting device modules from the XTDK offload package, retaining public symbols before optimization, and producing libflagcx_device.bc plus consumer-side headers, with communication traits going through XSHMEM. #677 under review fixes flagcxGetVersion decoding for version codes below ten thousand.
- Fixes: FlagGems fixes logical_and and a registration error; four under review (two cholesky_solve fixes for the complex path and upper-triangular handling, foreach_div’s _result_dtype localization, and batched operators depending on the day’s FlagTree build).
- Assessment: All of Kunlunxin’s activity this period is about making existing paths faster and more stable — no new features. This matches its form over the previous two weeks: earliest to integrate and broadest in coverage, hence also earliest into long-tail tuning. The bitcode build is the exception — it plugs Kunlunxin into FlagCX’s unified device abstraction, with long-term value exceeding any single-operator speedup.
3.3 MetaX: SGLang Plugin Adds Full MetaX Backend Package, Three Model Adaptations Under Review on the vLLM Side (10-26)
Date: 2026-10-26 Source: sglang-plugin-FL PR #50 · vllm-plugin-FL PR #642 · FlagGems-vllm PR #998
- SGLang backend: Merged a 31-file, 3,364-line MetaX and MACA backend package, including availability probing, reuse of CUDA-compatible implementations with MetaX-side wrappers (silu_and_mul, rms_norm, rotary_embedding, topk, fused_moe, FLA gated delta rule, etc.), plus runtime patches for SGLang internals (FlashInfer attention backend compatibility, MCCL-backed PyNCCL wrapper, sampling backend behavior, torchvision JPEG decode fallback), along with metax.yaml dispatch config and Qwen3 27B and 35B-A3B example scripts.
- vLLM side under review: #642 moves scheduling paths other than TXDA to vLLM 0.28.0 (Qingwei); #635 adds a BF16 baseline for Qwen3.8-Flash-Next; #636 adds preliminary BGE-M3 adaptation.
- Operator library: #998 under review fixes FlashAttention precision and graph capture issues and optimizes TP2 and TP4 performance; #1000 under review skips the unsupported TLE in in-place MoE alignment.
- Ecosystem side: RLinf mainline merged (see 2.2), its “upstream-first” landing in the embodied intelligence direction.
- Assessment: MetaX’s focus this period has shifted from the inference plugin to two lines — the full SGLang backend package and upstream framework merges. The SGLang plugin previously had only Ascend, Hygon, Iluvatar, and a few others; with MetaX joining, the vendor matrix on the inference framework side is essentially complete. Next to watch: whether the vLLM 0.28 upgrade aligns with the SGLang 0.5.18 cadence.
3.4 Qingwei: TXDA Backend Upgraded with vLLM 0.28.0, FlagCX Packaging Includes Qingwei (10-26)
Date: 2026-10-26 Source: vllm-plugin-FL PR #642 · FlagCX PR #673 · Reposted by JRJ: Open3D-PIMC ecosystem progress
- Plugin side: #642 under review adapts the TXDA backend to vLLM 0.28.0, part of the 2.3 cycle’s batch of “plugin follows upstream major version” work.
- Packaging side: FlagCX #673 under review extends RPM packaging to three backends — Qingwei, Xiwang, and Hygon — with Qingwei among them.
- Build side: On 10-22, Qingwei TX8 was added to the FlagTree builder and hooked into the daily build line, becoming the sixth backend; no new build changes this window.
- Ecosystem side: External promotion of Open3D-PIMC continues (see 2.1), explicitly positioned as FlagOS’s primary solution for next-generation 3D chips.
- Assessment: Qingwei’s form differs from other members — within FlagOS it is both a backend (TX8, TXDA) and the lead on a new hardware form factor (3D stacking, Open3D-PIMC). The two lines have not yet converged in code; true convergence would come only if Open3D-PIMC’s backend directly reuses FlagTree’s TX8 path.
3.5 Enflame, Hygon, Iluvatar, Moore Threads: One Structural Change Each Across Four Backends (10-26)
Date: 2026-10-26 Source: FlagPrism PR #17 · Torch-FL PR #654 · Torch-FL PR #660 · FlagTree tags
- Enflame: FlagPrism merged tops header and library dependency resolution (#17, 16 files, 2,126 lines), making Enflame SDK header and library lookup explicit rather than implicit; FlagAttention has an Enflame-side fused attention operator (fused_attnres) under review.
- Hygon: Torch-FL fixes the build source for the DCU runtime (#654) — DCU’s runtime_dir previously pointed to a directory holding only ABI shims, so the runtime library was linked from 32 stubs; the build passed but importing immediately raised undefined symbols. The change touches 71 files and 11,000 lines; #627, also under review the same day, wires real streams into boxed DCU builds.
- Iluvatar: Torch-FL #660 fixes bf16 GEMM falling back to host execution on Iluvatar — a 2048×2048 bf16 mm measured 0.41 TFLOPS, below the same machine’s CPU at 0.54, while the same operator in fp16 hit 80.2 and the vendor’s bundled torch 84.6; the root cause was that the support check omitted bf16 and that mm and addmm copied transposed weights on the host side. After the fix it goes through the vendor BLAS.
- Moore Threads: FlagTree issued an MThreads-specific tag (0.7.1a1+mthreads3.6); FlagGems-vllm merged the MThreads optimization for chunk_kda (#990); the MUSA backend’s TLE cache persistence change landed last week.
- Assessment: What the four share is fixing “runs but runs slowly or blows up halfway” problems rather than adding new operators. Such defects are the hardest to reproduce externally and best illustrate the true completeness of the backend matrix — vendor-side submissions still focus mainly on their own platform’s correctness and performance, while cross-platform unified semantics work is still driven by the FlagOS mainline.
IV. Summary and Trend Observations
- 2.3.0 has been through a complete pipeline once, but the tag still hasn’t been cut: The runtime gates, changelog, rebuild authorization, and version parameterization were in place from 10-23 to 10-25; on 10-26 the application-layer rebuild was authorized and the tag was converged to 2.3.0-0.3.0. The step from “runtime refresh” to “application version follow-up” usually comes right before an official release, so this week remains a key observation window.
- The backend matrix is expanding rather than converging: A new AMD ROCm 7.2.4 base image was added, indicating that the 2.3 cycle is still adding platforms. Correspondingly, DAMO XuanTie added BLAS1, SpacemiT took on RPM packaging, and Kunlunxin added device bitcode—these four items span three layers: numerical libraries, packaging, and communication, and all are work that “only becomes necessary after integration.”
- Numerical libraries and the training stack have become the new battleground: FlagBLAS added fifteen BLAS1 operators in one go, and FlagTrain rolled out a batch of operators across seven backends; both lines are accelerating in the 2.3 cycle. The marginal returns on inference operators are declining (FlagGems this period focused mainly on KernelGen auto-generated batches and backend tuning), while the gaps in training and numerical libraries are more pronounced.
- The vision direction has taken shape for the first time, but lacks performance evidence: FlagCV defines its positioning as “an OpenCV-shaped vision operator library implemented in Triton, benchmarked against the OpenCV CUDA baseline,” built on FlagTree. Currently there is only documentation and a skeleton, with no benchmarks or non-GPU backend data, so it is too early to judge its value.
- Review bandwidth has become the bottleneck: Submissions up 37%, under review up 23%, merges down 18%, new opens down 18%. The development side is accumulating, while the review side is digesting. The gap between the under-review volume (52 and 9) and the merge volume (49 and 4) is most pronounced in the FlagGems and FlagTree repos, and these two repos happen to be the source of the compiler and operator versions for 2.3.
- The quantum stack has entered a phase of scenario rollout: Three types of physics scenarios—error-correcting codes, neutral atoms, and thermal baths—are being advanced in parallel, still following the four-stage evidence-preserving workflow. It continues to account for nearly 60% of submissions across the organization, but its daily average has fallen by two-thirds relative to the previous period.
- For the third consecutive window, the information front has only member-organization press releases: Of 12 candidates, 2 were valid; FlagOS itself had no version release, no new repos, and no external announcements. The main content still comes from GitHub, a typical window of “code filling in backends while communications wait for a milestone.”
- Limitations: Submission retrieval uses GitHub search’s total_count metric (185 records), which differs from the merged-PR retrieval (133 records) due to squash merges and indexing delays; the case where FlagGems shows a merge count (49) higher than the submission retrieval count (28) falls into this category, and the report uses the merge count as authoritative. FlagQuantum’s 109 records include merge and branch-sync commits and do not equate to 109 feature changes. FlagTree’s 0.7.1a1+mthreads3.6 was cross-checked via both the Release list and the Tag API and confirmed to be a pure Tag with no Release notes. Statements in vendor press releases such as “no code changes required” and “matches or exceeds the paper” are company claims and have not been independently reproduced by third parties. In the SpacemiT article, “20 vendors, 30-plus chips” is inconsistent with the conference’s stated 21 vendors and 35 chips; the attribution has been noted in the main text.
Appendix: Source Verification Table and Full Source List
Source Verification Table
| Source | Verification Result |
|---|---|
| GitHub org repository API | All 61 repos returned; 18 repos had pushes within the 24-hour window |
| GitHub commit search | 185 commits, mapped by URL to 16 repos |
| GitHub merged PR search | 133 merged within the window, strongest being FlagGems with 49 |
| GitHub open PR search | 225 updated within the window, of which 74 newly opened |
| GitHub org event stream | 100 events: 49 PRs, 20 pushes, 10 branch creations, 7 branch deletions, 9 comments |
| Release and Tag atomic check | Of 31 repos, only FlagTree added one tag; no Release entries |
| Tag and Release cross-check | 0.7.1a1+mthreads3.6 confirmed via both the releases list and the git ref API as a pure Tag |
| Atom fallback | Supplementary checks on the docs and release-info repos: no commits on the main branch within the window; pushes landed on non-default branches |
| Key PR body verification | 15 PRs checked individually for title, lines changed, and merge time |
| Google News RSS | 24 Chinese and English queries yielded 12 candidates, 2 valid (via proxy) |
| HN Algolia | 8 queries over 4 days yielded 34 hits, none with a direct title match |
| CSDN FlagOS column | 51 links; the latest news article dates to late August, with no new articles in the window |
| BAAI Community | Search page is client-rendered, yielding only the shell page; not used this issue |
| Member company press releases | Full text of original releases from Tsingmicro and MetaX checked for dates and wording |
| Pending-inclusion queue | No files on this topic for the day; a scan of unarchived files also found no FlagOS section |
Full Source List
- [1] FlagOS org repositories — https://github.com/orgs/flagos-ai/repositories
- [2] FlagOS commit search (org: flagos-ai, 24 hours) — https://github.com/search?q=org%3Aflagos-ai+committer-date%3A%3E2026-10-25T22%3A00%3A00Z&type=commits
- [3] FlagOS merged PR search — https://github.com/search?q=org%3Aflagos-ai+is%3Apr+is%3Amerged+merged%3A%3E%3D2026-10-25T22%3A00%3A00Z&type=pullrequests
- [4] FlagOS open PR search — https://github.com/search?q=org%3Aflagos-ai+is%3Apr+is%3Aopen+updated%3A%3E%3D2026-10-25T22%3A00%3A00Z&type=pullrequests
- [5] build-infra PR #1488 (authorization to rebuild the vllm app on 2.3.0) — https://github.com/flagos-ai/build-infra/pull/1488
- [6] build-infra PR #1504 (AMD ROCm 7.2.4 base image) — https://github.com/flagos-ai/build-infra/pull/1504
- [7] build-infra PR #1502 (single interpreter for native plugin gate) — https://github.com/flagos-ai/build-infra/pull/1502
- [8] build-infra PR #1503 (move plugin tags out of sglang docs) — https://github.com/flagos-ai/build-infra/pull/1503
- [9] build-infra PR #1505 (print the plugin pins actually carried by tags) — https://github.com/flagos-ai/build-infra/pull/1505
- [10] FlagBLAS PR #154 (DAMO XuanTie L1 support) — https://github.com/flagos-ai/FlagBLAS/pull/154
- [11] FlagBLAS commits — https://github.com/flagos-ai/FlagBLAS/commits/master
- [12] FlagGems commits — https://github.com/flagos-ai/FlagGems/commits/master
- [13] FlagGems PR #7676 (XPU3 addmm_ in-place write) — https://github.com/flagos-ai/FlagGems/pull/7676
- [14] FlagGems PR #7688 (NaN-safe comparison for XPU3 less_equal) — https://github.com/flagos-ai/FlagGems/pull/7688
- [15] FlagGems PR #7635 (XPU3 foreach ternary scalar fusion) — https://github.com/flagos-ai/FlagGems/pull/7635
- [16] FlagGems PR #7618 (XPU3 foreach div) — https://github.com/flagos-ai/FlagGems/pull/7618
- [17] FlagGems PR #7613 (XPU3 foreach log) — https://github.com/flagos-ai/FlagGems/pull/7613
- [18] FlagGems PR #7669 (TLE scatter addressing for FP8 TopK) — https://github.com/flagos-ai/FlagGems/pull/7669
- [19] FlagGems PR #7631 (XPU isfinite optimization) — https://github.com/flagos-ai/FlagGems/pull/7631
- [20] FlagQuantum commits — https://github.com/flagos-ai/FlagQuantum/commits/main
- [21] FlagQuantum PR #874 (switch to read-only Quafu SDK) — https://github.com/flagos-ai/FlagQuantum/pull/874
- [22] FlagQuantum PR #924 (fixed-shots experiment contract) — https://github.com/flagos-ai/FlagQuantum/pull/924
- [23] FlagQuantum PR #919 (iSWAP gate pair) — https://github.com/flagos-ai/FlagQuantum/pull/919
- [24] FlagQuantum PR #913 (typed gate-link interface) — https://github.com/flagos-ai/FlagQuantum/pull/913
- [25] FlagQuantum PR #926 (manually gated Twin evolution cycle) — https://github.com/flagos-ai/FlagQuantum/pull/926
- [26] FlagCV repository and README — https://github.com/flagos-ai/FlagCV
- [27] FlagCV PR #2 (About and positioning statement) — https://github.com/flagos-ai/FlagCV/pull/2
- [28] FlagTrain PR #29 (fused_indices_to_multihot) — https://github.com/flagos-ai/FlagTrain/pull/29
- [29] FlagTrain PR #30 (baseline comparison and performance summary) — https://github.com/flagos-ai/FlagTrain/pull/30
- [30] FlagTrain PR #35 (multi_tensor_adam, open) — https://github.com/flagos-ai/FlagTrain/pull/35
- [31] FlagTrain PR #18 (fp8_gemm, open) — https://github.com/flagos-ai/FlagTrain/pull/18
- [32] FlagTree tags and Release list — https://github.com/flagos-ai/FlagTree/tags
- [33] FlagTree PR #1410 (HCU set_layout) — https://github.com/flagos-ai/FlagTree/pull/1410
- [34] FlagTree PR #1403 (ROCm loads rdata via HIP host registration) — https://github.com/flagos-ai/FlagTree/pull/1403
- [35] FlagTree PR #1373 (FlagMega Qwen3 profile slice types) — https://github.com/flagos-ai/FlagTree/pull/1373
- [36] optest PR #11 (unify flagos-gpu-check) — https://github.com/flagos-ai/optest/pull/11
- [37] FlagGems-sglang PR #227 (register 16 additional operators) — https://github.com/flagos-ai/FlagGems-sglang/pull/227
- [38] FlagGems-sglang PR #134 (competition track add3 operator) — https://github.com/flagos-ai/FlagGems-sglang/pull/134
- [39] FlagGems-sglang PR #164 (chunked prefix-cache indexing operator) — https://github.com/flagos-ai/FlagGems-sglang/pull/164
- [40] FlagPrism PR #17 (Enflame tops headers and library dependencies) — https://github.com/flagos-ai/FlagPrism/pull/17
- [41] FlagCX PR #676 (Kunlunxin XPU device bitcode build) — https://github.com/flagos-ai/FlagCX/pull/676
- [42] FlagCX PR #673 (Tsingmicro, Xiwang, and Hygon RPM packaging, open) — https://github.com/flagos-ai/FlagCX/pull/673
- [43] sglang-plugin-FL PR #50 (add MetaX backend) — https://github.com/flagos-ai/sglang-plugin-FL/pull/50
- [44] vllm-plugin-FL PR #642 (Tsingmicro TXDA adapted to vLLM 0.28.0, open) — https://github.com/flagos-ai/vllm-plugin-FL/pull/642
- [45] vllm-plugin-FL PR #625 (Ascend BF16 MoE expert parallelism) — https://github.com/flagos-ai/vllm-plugin-FL/pull/625
- [46] FlagGems-vllm PR #990 (MThreads chunk_kda optimization) — https://github.com/flagos-ai/FlagGems-vllm/pull/990
- [47] FlagGems-vllm PR #998 (MetaX FlashAttention accuracy and graph capture, open) — https://github.com/flagos-ai/FlagGems-vllm/pull/998
- [48] Torch-FL PR #654 (DCU runtime build source) — https://github.com/flagos-ai/Torch-FL/pull/654
- [49] Torch-FL PR #660 (Iluvatar bf16 GEMM via vendor BLAS) — https://github.com/flagos-ai/Torch-FL/pull/660
- [50] Torch-FL PR #663 (host-side conversion when no CUDA kernel is available) — https://github.com/flagos-ai/Torch-FL/pull/663
- [51] FlagAttention PR #115 (Enflame fused attention operator, open) — https://github.com/flagos-ai/FlagAttention/pull/115
- [52] JRJ.com (reposted by Sohu): From tech conference to classrooms in 30 countries — https://m.sohu.com/a/1092777264_114984
- [53] Xinhua: Open3D-PIMC fills a key gap in the domestic compute software ecosystem — http://www.news.cn/finance/20260914/0aa70ce06a464f7fab31403fb884da96/c.html
- [54] 10jqka repost of MetaX: RLinf merged into the official mainline — http://stock.10jqka.com.cn/20261026/c681090455.shtml
- [55] MetaX official news center — https://www.metax-tech.com/
- [56] CSDN FlagOS column — https://flagos.csdn.net/
- [57] HN Algolia search — https://hn.algolia.com/api/v1/search_by_date?query=FlagOS&tags=story