Research window: 2026-10-23 06:00 ~ 2026-10-26 06:00 (Beijing time, 72 hours; Monday morning report, window continues from the previous daily report’s cutoff, covering Saturday and Sunday).

Sources: GitHub (full audit of 61 repos under org: flagos-ai, commit search of 612 entries including pages 6–8 completion, search of 274 merged PRs and 253 open PRs, 99 org event stream entries, atomic audit of Releases/Tags across 31 repos, Atom fallback for 5 repos), FlagRelease model repos (recent-update audit of 60 model repos under the Hugging Face organization), Google News RSS (24 sets of Chinese and English query terms, via proxy), HN Algolia (8 sets), CSDN FlagOS column, BAAI Community, InfoQ and member-organization press releases (see appendix source list for details).

This Issue’s Index

  • Today’s Highlights: MiniMax-M3.1-Flash nine-chip W8A8 delivered same day; Runtime 2.3.0 enters rebuild authorization stage; FlagQuantum logs 505 commits in three days (10-23 ~ 10-26)
  • I. Open Source Project Progress (GitHub Activity)
    • 1.1 Organizational Rhythm: 16 repos pushed, 612 commits, 274 merges, FlagQuantum accounts for 80% of commits (10-23 ~ 10-26)
    • 1.2 FlagRelease: MiniMax-M3.1-Flash nine-chip W8A8 listed same day, four vendors use Express edition (10-23)
    • 1.3 Runtime 2.3.0: Two changelog dates finalized, rebuild authorized, containers can select FlagGems and FlagTree versions via launch parameters (10-23 ~ 10-25)
    • 1.4 FlagQuantum: 505 commits and 148 merges in three days, QEC package restructuring and FTQC Stage A pilot run in parallel (10-23 ~ 10-26)
    • 1.5 FlagQuantum: Quafu SDK lifecycle fully switched over, Rydberg presence contract established (10-25 ~ 10-26)
    • 1.6 FlagGems: 50 merges, Kunlunxin defect fixes and KernelGen operator batch landing in parallel (10-23 ~ 10-24)
    • 1.7 FlagGems-sglang: 34 competition-track operator merges, first addition of Debian and RPM packaging (10-23 ~ 10-25)
    • 1.8 Torch-FL: Vendor naming refactor completed in one pass, 16 merges in two days (10-23 ~ 10-25)
    • 1.9 Inference Plugins: vllm-plugin-FL integrates MiniMax-M3.1, sglang-plugin-FL adds Hygon Qwen3.6 MTP decoding (10-23 ~ 10-24)
    • 1.10 Other Repos: FlagTree tracks MTHREADS backend, FlagTrain adds fused operators, optest CLI three changes and one revert (10-23 ~ 10-25)
  • II. News Coverage and Ecosystem
    • 2.1 InfoQ Long-form Retrospective on FlagOS 2.2: 107 member units, 464,000 quarterly downloads (10-24)
    • 2.2 MetaX and Moore Threads Announce MiniMax M3.1 Flash Day-0 Adaptation on Same Day (10-23)
    • 2.3 Channel Verification: 44 candidates, 3 valid, no new CSDN column articles within window (10-26)
  • III. Member Units and Backend Vendor Deep Dive
    • 3.1 Hygon: Beyond the W8A8 edition among nine chips, MiniCPM-V 4.7 dual versions land same day (10-23)
    • 3.2 Kunlunxin: Over ten fixes and speedups on the FlagGems side, XPU3 path consolidated (10-23)
    • 3.3 DAMO XuanTie: Zhenwu Express edition delivered, PPU sparse attention under review (10-23 ~ 10-25)
    • 3.4 Tsingmicro, T-Head, Moore Threads, MetaX: Four vendors each have a batch of commits on the operator library side (10-23 ~ 10-25)
  • IV. Summary and Trend Observations
  • Appendix: Source Verification Table and Complete Source List

Today’s Highlights: MiniMax-M3.1-Flash Nine-Chip W8A8 Delivered Same Day; Runtime 2.3.0 Enters Rebuild Authorization; FlagQuantum Logs 505 Commits in Three Days (10-23 ~ 10-26)

Date: 2026-10-23 ~ 2026-10-26　Sources: FlagOS Multi-Chip Support Notes (MiniMax-M3.1-Flash) · FlagRelease model organization · build-infra PR #1484 · FlagQuantum commits (full list in appendix)

  • Delivery: MiniMax open-sourced M3.1 Flash on 10-23, and the FlagOS community listed W8A8 versions for nine chips on ModelScope and Hugging Face the same day: DAMO XuanTie (Zhenwu), NVIDIA, MetaX, Hygon, Huawei Ascend, Moore Threads, Iluvatar CoreX, Kunlunxin, and Tsingmicro. The nine repos were created in a burst between 14:06 and 14:39 on 10-23, with two additional video-model repos and dual versions of Hygon MiniCPM-V 4.7 following the same day.
  • Technical: FlagOS converted the model’s original QAT NVFP4 weights into a cross-chip unified W8A8 format. NVIDIA, Ascend, Kunlunxin, and DAMO XuanTie offer Express editions (model names carry -FlagOS-Express), while the other five are standard editions; the source path is given using the DAMO XuanTie example, combining vLLM 0.24.0 with vllm-plugin-FL 0.3.0 and FlagGems 5.4.0, with 8-card tensor parallelism.
  • Versions: build-infra recorded a 2.3.0 changelog date on both 10-23 and 10-25 (Cambricon neuware 4.4.3, MetaX maca 3.8.1.3), and on 10-25 authorized the 2.3.0 runtime rebuild; the container adds a startup-time version parameter that can pin a FlagGems version or have FlagTree install the day’s build. 2.3.0 has not yet been tagged.
  • Development: 612 commits and 274 merges in the window, of which FlagQuantum alone accounts for 505 commits (82.5%) and 148 merges (54%). Organization-level activity is now highly concentrated in the quantum stack, with the remaining repos mainly focused on fixes and test contracts.
  • Assessment: This is the second “nine chips ship on model open-source day” within a week, following GLM-5.3-Flash. The difference lies in the form of the deliverable: the previous round ran BF16 and multiple precisions in parallel, while this round converges on a single W8A8 path and packages four commonly used platforms as Express editions — indicating that Day-0 delivery has moved from “can it run” to “batch replication in a unified format.”

I. Open-Source Project Progress (GitHub Activity)

1.1 Organization Rhythm: 16 Repos Pushed, 612 Commits, 274 Merges; FlagQuantum Accounts for 80% of Commits (10-23 ~ 10-26)

Date: 2026-10-23 ~ 2026-10-26　Source: flagos-ai organization repositories · Commit search · Merged PR search

  • Repository coverage: 16 of 61 repos had pushes in the window. By commit count: FlagQuantum 505, FlagGems-sglang 39, FlagGems 27, Torch-FL 16, build-infra 12, optest 4, FlagGems-vllm 4, vllm-plugin-FL 2, sglang-plugin-FL 1, FlagTree 1, FlagTrain 1. Pushes to docs, release-info, FlagSparse, Trident, and FlagBLAS landed on non-default branches; their main branches saw no new commits.
  • Merge coverage: 274 merged PRs, split as FlagQuantum 148, FlagGems 50, FlagGems-sglang 34, Torch-FL 16, build-infra 12, FlagGems-vllm 4, optest 4, vllm-plugin-FL 2, sglang-plugin-FL 2, FlagTree 1, FlagTrain 1.
  • Review coverage: 253 open PRs were updated in the window, of which 141 were newly opened. By repo: FlagGems 144 (84 new), FlagGems-vllm 20, vllm-plugin-FL 14, FlagTree 14, FlagGems-sglang 14, docs 6, FlagTrain 6, sglang-plugin-FL 6, Torch-FL 5, FlagQuantum 4, FlagAttention 4, FlagScale 4.
  • Daily averages: The window spans 72 hours, equivalent to 204 commits/day (135 in the previous 24-hour window), 91 merges/day (163 previously), and 47 new PRs/day (90 previously). Development-side input rose while review throughput fell—the previous period was “the queue draining,” this period is “new code piling up.”
  • Release coverage: Atomic checks of Releases and Tags across 31 repos found zero additions in the window; no formal release occurred over the 4-day span. build-infra’s latest tag remains v2.2.0, leaving the 2.3.0 rebuild authorization in a “authorized but unreleased” limbo.
  • Event coverage: 99 org events: 50 PR events, 20 pushes, 15 branch deletions, 8 branch creations, 3 follows, 2 reviews, 1 comment. The coexistence of 15 branch deletions and 8 creations reflects the ongoing “merge batch branch, then delete it” pipeline habit.
  • Assessment: The commit-to-merge gap is concentrated in FlagQuantum (505 commits vs. 148 merges, a 29% merge rate), while FlagGems-sglang runs the opposite way (39 commits vs. 34 merges, 87%). The former is building a long-cycle scientific-computing evidence chain; the latter is bulk-ingesting competition-track operators. The coexistence of these two rhythms is the most striking structural feature of this window.

1.2 FlagRelease: MiniMax-M3.1-Flash W8A8 Lands on Nine Chips Same Day, Four Use Express Edition (10-23)

Date: 2026-10-23　Source: FlagOS multi-chip support notes · FlagRelease organization models · vllm-plugin-FL PR #631

  • Adaptation scope: Nine platforms—DAMO XuanTie (Zhenwu), NVIDIA, MetaX, Hygon, Huawei Ascend, Moore Threads, Iluvatar CoreX, Kunlunxin, and Tsingmicro—all offer W8A8 versions. Model repos sit under the FlagRelease organization, published via both ModelScope and Hugging Face.
  • Quantization path: FlagOS converts MiniMax’s native QAT NVFP4 weights into a cross-chip general-purpose W8A8 deployment version, with no secondary training on-device. NVIDIA, Ascend, Kunlunxin, and DAMO XuanTie are Express editions, named MiniMax-M3.1-Flash-W8A8-<platform>-FlagOS-Express; the other five are standard editions.
  • Model specs: M3.1 Flash has 428B total parameters and 23B activated, supports 1M context and image/video input, and adds an adjustable thinking-depth parameter. Official figures cite nearly 3x faster online inference than the previous generation and a 70% drop in composite token cost for agent scenarios.
  • Deployment path: The docs offer two routes—the recommended one is to use FlagRelease images directly (pick the repo by chip, pull drivers and containers by model card), or install from source: the DAMO XuanTie example uses vLLM 0.24.0, vllm-plugin-FL 0.3.0, and FlagGems 5.4.0, adding FlagTree and FlagCX as needed, and serves with tensor_parallel_size=8.
  • Code-side support: vllm-plugin-FL merged “add MiniMax-M3.1 support and inference example” (#631) at 10-24 08:25, bringing model integration and inference examples into main together; FlagGems-vllm merged the PPU-side flash_mla_sparse_fwd (#975) at 10-23 17:19, matching M3.1’s sparse MLA path.
  • Assessment: All nine repos were created within half an hour, showing the release pipeline is now templated. The real differentiator is the runtime matrix in each model card (framework version, plugin branch, FlagGems commit, whether FlagCX is needed)—which is also the verifiable basis for judging whether adaptation is genuine.

1.3 Runtime 2.3.0: Two Changelog Dates Settled, Rebuild Authorized; Containers Can Select FlagGems and FlagTree Versions via Startup Parameters (10-23 ~ 10-25)

Date: 2026-10-23 ~ 2026-10-25　Source: build-infra PR #1472 · PR #1475 · PR #1480 · PR #1482 · PR #1484 · PR #1487

  • Process change (#1472): Runtime image pushes must now include a changelog with a recorded date, or the pipeline rejects the push; #1478 further requires each changelog to record FlagTree’s version override value. Release traceability moves from “human memory” to a “gate.”
  • Version traceability: At 10-23 14:40 the bot committed the 2.3.0 changelog date (Cambricon neuware 4.4.3), and at 10-25 18:26 committed another (MetaX maca 3.8.1.3). Both were auto-generated by github-actions, indicating the corresponding vendors’ backend combinations have entered the build list.
  • Rebuild authorization (#1484): At 10-25 10:03, a version-requested rebuild of the 2.3.0 runtime was authorized. Immediately following, #1485 fixed a quoting issue in the OCI tag build parameter and #1486 fixed vendor SDK environment variables losing the venv prefix—both clearing obstacles for the rebuild.
  • Parameterization (#1480, #1482): Containers support FLAGTREE_VERSION=latest to install same-day builds and FLAGGEMS_VERSION to specify a FlagGems version; versions move from “baked into the image” to “selected at startup.” #1477 also removed the -build variant, making clear that the runtime image is the deliverable.
  • Assessment: 2.3.0’s preparation centers on reproducibility rather than new features—gate, traceability, authorization, and parameterization are all in place, with only tagging left. Given build-infra’s established rhythm, tagging is typically followed by a batch re-release of all-backend images; it will then be worth checking whether each vendor’s changelog has been filled in for all nine.

1.4 FlagQuantum: 505 Commits and 148 Merges in Three Days; QEC Package Restructuring and FTQC Stage A Pilot Run in Parallel (10-23 ~ 10-26)

Date: 2026-10-23 ~ 2026-10-26　Source: FlagQuantum commits · PR #749 · PR #832 · PR #868

  • Totals: 505 commits and 148 merges, both first in the organization; 82.5% of commits and 54% of merges. Work ran continuously for three days, with the latest merge at 10-26 01:08.
  • QEC package restructuring (nine consecutive PRs, #735 ~ #749): Error-correction codes were split from a single implementation into bounded packages—first auditing package boundaries and compatibility baselines (#735), then isolating code matrices and noise sweeps (#737), splitting code families and ownership (#739), separating storage declarations from execution assembly (#740), extracting the detector error model (#744), separating decoding algorithms from optional adapters (#746), finalizing package layout and installation guidance (#748), and finally merging into main as one unit (#749). This was directory surgery aimed at installability.
  • FTQC Stage A pilot (#832 and follow-ups): At 10-25 02:12, bounded-scale pilot resources and observation records were merged, followed by hybrid circuit strategy research (#846), a seven-point continuation plan (#860), finalization of the hybrid pilot ledger (#868), and physical evaluation of continuation checkpoints (#847). The path is characterized by three-stage evidence—budget, observation, conclusion—rather than a single run to completion.
  • Ising branch: From 10-25 08:55, seeded Ising charge-trajectory execution was offered; from 10-25 13:02, fixed detector layouts were validated from measurement records; the sampling plan (#838) and contract baseline merged the same day.
  • CI side: Added MC550 batch runs (#742), expanded A800 CPU capacity, and adjusted manual-verification routing (#743, #745); open PR #762 proposes pausing PR scheduling for R300 and making pool eligibility manual.
  • Assessment: The quantum stack completed a structural reorganization in three days—package boundaries, error models, and decoders are now independent, clearing clean space for later integration of M3’s sampling and terminal instrument interfaces. With a 29% merge rate, many commits are still on proposals and evidence chains and should not be read in the short term as “feature delivery.”

1.5 FlagQuantum: Full Quafu SDK Lifecycle Switch, Rydberg Presence Contract Established (10-25 ~ 10-26)

Date: 2026-10-25 ~ 2026-10-26　Source: PR #852 · PR #855 · PR #856 · PR #862 · PR #866 · PR #876

  • Quafu migration (six consecutive PRs, 10-25 18:23 ~ 23:26): Discovery flow moved to the SDK (#852), logical task migration (#855), QSteed physical programs submitted via the SDK (#856), topology parsing via the SDK (#858), twin lifecycle migration (#862), and finally retirement of the old execution lifecycle (#866). The old path was deleted rather than kept as an alias—a hard switch.
  • Open-PR wrap-up: PR #857 completes the remainder of the lifecycle migration and #874 performs a read-only SDK switch, both still open—showing the switch is being advanced in batches at a rollback-friendly granularity.
  • Rydberg presence contract (10-25 16:35 ~ 10-26 01:08): First a contract baseline (#854), then rejection of observations in unconditional Rydberg assembly (#865), followed by encoding single presence observations (#869), proposing bounded coherent-branch consistency (#870), validating bounded coherent-branch references (#873), and finally proposing finite dynamic coherence references (#876, merged 10-26 01:08).
  • Assessment: Both lines are closing out by “defining the contract first, then releasing the implementation.” Quafu’s switch from a self-built execution lifecycle to the vendor SDK means external dependencies on the quantum hardware side have formally taken shape; Rydberg presence advancing from “can it be declared” to “can it be observed” is the last stretch before the neutral-atom route crosses the M3 threshold.

1.6 FlagGems: 50 Merges; Kunlunxin Bug Fixes and Batch KernelGen Operator Landings in Parallel (10-23 ~ 10-24)

Date: 2026-10-23 ~ 2026-10-24　Source: FlagGems commits · PR #7095 · PR #7274 · PR #6623 · PR #7199

  • Totals: 50 merges and 27 main-branch commits, the second-highest merge count in the organization; KernelGen and Kunlunxin lines landed alternately.
  • Kunlunxin (XPU3) concentrated fixes: addmv_out gained M=0, beta=0, and N=0 boundaries (#7095); log_softmax forward switched to integer keys for max and added an N==1 fast path (#7523); special_log1p scalar input reverted to a 0-dim tensor (#7457); rnn_relu gained a fused kernel and autograd support (#7110); scaled_grouped_mm performs FP8 E4M3 decoding on the backend (#7274); plus a batch of fixes and speedups for frexp, conj_physical_, unsqueeze, and upsample_linear1d backward (#7610, #7599, #7560, #7595, #7349, #7354).
  • KernelGen batch: Added sparse BSR operators (#7076), switched foreach-series tests to direct candidate injection and opened batches 01 through 09 consecutively (#7543 to #7551), einsum definitions and injectable suites (#7637), benchmark result JSON retention priority (#7615), and precise OOM skips after a cross-seven-platform reference audit (#7662).
  • Other backends: Moore Threads FP8 matmul switched to TLE warp specialization (#6623); Ascend isolated addmm tuning candidates from mm (#7575); MetaX fixed scaled_mm case collection and backend capability checks and fixed and mode (#7248, #7454), and added two convolution_backward operators (#7016); NVIDIA optimized Hopper FP8 small-M shapes (#7068).
  • Cleanup: Removed the first batch of mistakenly ported CPU operators (#7199), a rollback of early copy-style cross-chip porting.
  • Assessment: No library-level new-operator push this period; the focus is on “fixing existing operators until they work on each backend.” The #7199 rollback and the #7662 OOM audit are two sides of the same thing: acknowledge the historical porting debt, then clear it item by item against test contracts.

1.7 FlagGems-sglang: 34 Competition-Track Operator Merges, First Debian and RPM Packaging (10-23 ~ 10-25)

Date: 2026-10-23 ~ 2026-10-25　Source: FlagGems-sglang commits · PR #210 · PR #191 · PR #196

  • Totals: 34 merges and 39 commits, an 87% merge rate—the highest merge efficiency in the organization.
  • Competition-track supply: Most merges carry the [FlagOS Competition-Track1] prefix, from external contributors including yzw1128, c2flowDS, SweetDeathh, love530love, xuanzhengdu-eng, liangkw16, sinpeyw, goldenfox2025, and hangglider5, covering SGLang inference-path operators such as MLA buffer read/write, layout reordering, Top-K sampling, MoE zero experts, cache positioning, and soft pooling.
  • Rhythm: 33 merges landed in just over two hours from 10-23 15:47 to 18:02, including nine within ten minutes from 16:21 to 16:31; memcpy_triton (#196) was added at 10-25 22:37 to wrap up the batch.
  • Engineering side: Added Debian and RPM packaging (#191) and fixed SQLAlchemy 1.4 compatibility (#190), showing the repo is no longer just an operator collection but is taking on the role of an installable distribution.
  • Open PRs: 13 newly opened PRs remain mostly competition-track operators (#207 to #220), plus a device-metadata initialization fix.
  • Assessment: The competition has become a stable operator supply channel; within two weeks the repo went from scattered commits to a project with distribution packages. The risk is equally clear—review pressure concentrates in one repo, a single person can merge a dozen PRs in a day, and contract consistency depends on follow-up test batches.

1.8 Torch-FL: Vendor Naming Refactor Completed in One Pass, 16 Merges in Two Days (10-23 ~ 10-25)

Date: 2026-10-23 ~ 2026-10-25　Source: Torch-FL commits · PR #643 · PR #649 · PR #653 · PR #639

  • Totals: 16 merges and 16 main-branch commits, all led by lvyufeng.
  • Naming refactor (#645 ~ #650): Changed the boxing slot from Backend::kCuda to Backend::kBoxing (#645), added vendor names to each platform (#646), renamed source and CI directories by vendor (#647), config, flags, and packaging directories (#648), backend enums and NVIDIA routing keys (#649), and finally fixed lookup mismatches left by the rename (#650). All six completed between 13:38 and 15:59.
  • Semantic fix (#643): Clarified that “boxing must not be routed from default config” and added a boxing-only day-0 config—turning “fall back to the packaging path when a platform lacks an operator” from implicit behavior into an explicit declaration.
  • Platform fixes: MPS preserved MPSGraph broadcast shapes (#640), gave linear operator cases CPU references and readable diffs (#606), and kept the Qwen3.5 vision factory and interpolation on MPS (#639); CUDA routed operators to FlagGems instead of empty slots (#638); #653 fixed MPS wheel platform naming and prefix pre-checks.
  • Open PRs: 4 newly opened, including DCU runtime built from CUDA source (#654), CMake platform parsing compatible with both spellings (#651), and Iluvatar non-inner reductions avoiding masked row blocks (#644); #603’s FlagCICD contract-based orchestration remains open.
  • Assessment: Completing a naming refactor across six PRs in one afternoon shows Torch-FL’s vendor abstraction layer is still thin and its coupling manageable; making boxing behavior explicit is a direct response to “silent fallback,” one of the hardest classes of bug to diagnose.

1.9 Inference Plugins: vllm-plugin-FL Adds MiniMax-M3.1, sglang-plugin-FL Adds Hygon Qwen3.6 MTP Decoding (10-23 ~ 10-24)

Date: 2026-10-23 ~ 2026-10-24　Source: vllm-plugin-FL PR #631 · sglang-plugin-FL PR #149 · FlagGems-vllm PR #975 · FlagGems-vllm PR #991

  • vLLM side: Merged MiniMax-M3.1 support and inference examples at 10-24 08:25 (#631), the code-side alignment action for the nine-chip delivery; another merge at 10-23 10:24 pinned a FlagGems-vllm math shim fix into CI (#610).
  • SGLang side: Hygon implemented Qwen3.6 MTP decoding in eager mode (#149, 10-23 15:23), and the supported model and chip list was updated the same day (#151).
  • Operator side: FlagGems-vllm merged PPU’s flash_mla_sparse_fwd (#975) on 10-23, fixed Moore Threads top_k_per_row_prefill misordering in narrow value bands (#831), optimized PH1 block-scaled FP8 bmm (#893), and added a sampling path to persistent_topk (#991).
  • Open PRs: 14 vllm-plugin-FL and 6 sglang-plugin-FL PRs were updated in the window, including sglang-plugin-FL #153 fixing Ascend hybrid vision-language batching and deterministic reductions, and #139 adding empty-runtime adaptation for Iluvatar SGLang 0.5.18.
  • Assessment: The two plugin repos merge little per PR, but each corresponds to a real inference path for one vendor. The software-side evidence for the nine-chip delivery ultimately rests in the model-card version matrices of these PRs.

1.10 Other Repos: FlagTree Tracks MTHREADS Backend, FlagTrain Adds Fused Operators, optest Makes Three CLI Changes and One Revert (10-23 ~ 10-25)

Date: 2026-10-23 ~ 2026-10-25　Source: FlagTree PR #1416 · FlagTree PR #1436 · FlagTrain PR #15 · optest PR #10 · FlagBLAS PR #154

  • FlagTree: Only one main-branch merge—the Moore Threads backend tracked upstream 0842829c1 (#1416). 14 open PRs, notably Kunlunxin’s distributed TLE backend (#1436, opened 10-25), tle.gpu.copy gaining pad_value (#1429), explicit tile copy ranges (#1433), Ascend tl.where accepting pointer operands (#1430), and per-backend deb packaging (#1417).
  • FlagTrain: Merged the wf6af16_linear fused operator (#15), covering Triton implementations for NVIDIA, Iluvatar, MetaX, and Moore Threads; open PRs include moe_gemm (#31), fp8_gemm (#18), and mixed_gemm (#10), filling in training-side operator supply.
  • optest: Three changes and one revert in a day—support for current and explicit project directories (#7), removal of the legacy root profile (#8), report command switched to the default working directory (#9), then a revert of #8 (#10). The revert indicates the profile approach must be retained—an experimental convergence.
  • FlagBLAS: Opened PR #154 “Add T-Head L1 support” on 10-24, wiring DAMO XuanTie’s L1 operators into the BLAS library; no new commits on the default branch.
  • Trident and FlagSparse: Trident’s feature/monad branch was pushed five times from 10-24 to 10-25, with PR #4 introducing a Monad intermediate layer for computation composition; FlagSparse saw pushes only on the zyq_sparse branch, with the main branch silent.
  • docs and release-info: docs was pushed three times by the bot on model-list branches (ModelScope, Aihuanxin, and Hugging Face, one each), with corresponding PRs still open; release-info’s gh-pages was updated three times, but the atomic check of 31 repos found no new Tags or Releases.

II. News Coverage and Ecosystem

2.1 InfoQ’s Long-form Retrospective on FlagOS 2.2: 107 Member Organizations, 464K Quarterly Downloads (10-24)

Date: 2026-10-24　Source: InfoQ: BAAI Zhongzhi FlagOS 2.2 Enables Co-evolution of Frontier Models and Diverse Compute

  • Ecosystem metrics: As of Q3, the FlagOS ecosystem has 107 member organizations and 464,336 community downloads for the quarter, 4.76x that of Q2; 264 code contributors, up 55% from the previous release.
  • Development metrics: From 2.1 to 2.2, merged PRs rose from 1,890 to 4,890, code commits from 5,100 to 9,730, and new issues from 420 to 1,423.
  • Technical metrics: The nine operator libraries total 1,454 operators, up 890 from the previous release; across more than a thousand operators and 10 chips, overall cross-chip performance improved by about 27%; GLM-5.3-Flash on existing Ascend 910B hardware raised logical-service throughput from 8.52k to 17.36k tokens/s (2.04x), with 60.9 tokens/s generation at 512K long context.
  • Cost metrics: Based on a monthly rental of RMB 16,500 per 8-card 910B node, 3P1D deployment, and a 93% cache hit rate, the cost per million output tokens works out to RMB 59.27 for 256K input at 8 concurrent requests and RMB 104.53 for 512K input at 4 concurrent requests—19.4% and 27.6% lower than the corresponding commercial API billing references.
  • Assessment: This is the most complete Chinese-language technical retrospective since the 2.2 release, and its value lies in providing comparable community metrics (downloads, contributors, PR counts) rather than just performance figures. Note that the cost figures are estimates “converted from rental fees,” not measured comparisons under identical workloads; this caveat should be retained when citing them.

2.2 MetaX and Moore Threads Both Announce Day-0 Support for MiniMax M3.1 Flash on the Same Day (10-23)

Date: 2026-10-23　Source: Sina Tech: MetaX Xiyun C Series Runs MiniMax M3.1 Flash on Day 0 · Jiemian News: Moore Threads Completes MiniMax M3.1 Flash Support

  • MetaX: On 10-23, the day of the open-source release, the Xiyun C series completed Day-0 deep support, which the company says relies on the MXMACA full-stack software suite (driver, MXCC compiler, operator libraries, inference framework support); since December 2025 it has completed Day-0 support for 45 flagship models, and this is its fourth time following a MiniMax flagship.
  • Moore Threads: Support was completed the same day on the flagship training-and-inference card MTT S5000 with the MUSA software stack, phrased as “support completed” rather than “Day-0.”
  • Framing comparison: Both press releases emphasize the capabilities of their own software stacks (MXMACA and MUSA); the FlagOS-side deliverables are the FlagRelease nine-chip W8A8 repository and the two plugins vllm-plugin-FL and sglang-plugin-FL. Both can be true at once, but they are not the same thing—vendor framing is suited to assessing single-chip day-one availability, while FlagOS framing is suited to assessing unified cross-chip formats and batch replication capability.
  • Assessment: Day-0 has become a standard marketing milestone for domestic chip vendors, and media phrases like “first” and “pioneering” are no longer scarce. What really differentiates vendors is whether the deliverables are downloadable and whether the version matrix is spelled out—and on this point, both FlagOS and the two vendors provided verifiable materials this round.

2.3 Channel Audit: 3 Valid Items Out of 44 Candidates; No New CSDN Column Posts in Window (10-26)

Date: 2026-10-26　Source: Google News RSS (via proxy) · CSDN FlagOS Column · HN Algolia

  • Google News: 24 Chinese and English query terms returned 44 items within the window; after filtering item by item on title semantics, 3 were valid—the InfoQ 2.2 retrospective and the MetaX and Moore Threads Day-0 press releases. The rest were stock market coverage, share-price pieces on Enflame and Tsingmicro, and AI research posts from the BAAI community, none directly related to the FlagOS software stack.
  • Noise patterns: 燧原科技 when:7d returned 15 items, almost all STAR Market quotes and funding data; 摩尔线程 开源 when:7d returned 14 items, all taken up by MiniMax open-source coverage; 清微智能 when:7d hit one self-media clickbait piece. For such queries going forward, only items whose titles contain “FlagOS/operator/software stack/chip support” need be kept.
  • CSDN Column: The latest post is a 10-22 19:00 livestream preview for a university roundtable, with no new posts in the window; the column’s current headlines remain the GLM-5.3-Flash nine-chip Day0 and Qwen3.8-Flash-Next eight-chip support, both from earlier issues. As of the end of this window, the column post on M3.1 nine-chip support had not yet been published.
  • HN Algolia: 8 queries returned 36 hits over 4 days; FlagOS and FlagGems had 3 each but no direct title matches, and the 30 BAAI hits were all model and research discussions, none FlagOS-related.
  • BAAI Community: The search page is client-rendered, and scraping yielded only the framework page, so it cannot serve as an item source; no content was taken from this channel in this issue.

III. Deep Dive into Member Units and Backend Vendors

3.1 Hygon: Beyond the W8A8 Version Among the Nine Chips, MiniCPM-V 4.7 Dual Versions Land in the Repo on the Same Day (10-23)

Date: 2026-10-23　Source: FlagRelease model organization · sglang-plugin-FL PR #149 · FlagScale PR #1299

  • Model delivery: The W8A8-hygon-FlagOS standard version of MiniMax-M3.1-Flash lands in the repo; on the same day between 17:47 and 17:48, two additional MiniCPM-V 4.7 repos are published (1B BF16 and 35B-A3B BF16), filling Hygon’s gap on the vision model line.
  • Inference pipeline: sglang-plugin-FL merges Qwen3.6 MTP decoding in eager mode (#149), opening the speculative decoding path on Hygon; the supported model and chip lists are updated the same day (#151).
  • Operators and attention: FlagAttention has two items under review—removing the FP8 MSA path and fixing test imports (#109), and adding HY3 backend support (#112, newly opened 10-25).
  • Training side: FlagScale’s PR #1299 under review adds DCU hardware health sampling, a long-running review item (since 9-18).
  • Assessment: Hygon’s actions in this window are “rolling out the model line, adding MTP to the inference line, and opening a new backend on the attention line”—three lines advancing simultaneously, but all delivered as standard versions rather than Express versions, consistent with its positioning among the nine chips in FlagOS.

3.2 Kunlunxin: A Dozen-Plus Fixes and Speedups on the FlagGems Side, XPU3 Paths Converging (10-23)

Date: 2026-10-23　Source: FlagGems PR #7095 · PR #7110 · PR #7274 · FlagTree PR #1436

  • Volume of operator fixes: About 15 merges tagged Kunlunxin within the FlagGems window, covering addmv, log_softmax, rnn_relu, scaled_grouped_mm, frexp, conj_physical_, unsqueeze, upsample_linear1d backward, batch ops, and more, most labeled [KunlunXin][XPU3].
  • Performance side: log_softmax forward gains an N==1 fast path, unsqueeze and the upsample_linear1d backward path are sped up, and foreach and or_scalar performance fixes—these are stabilizers rather than new capabilities.
  • Compiler side: FlagTree’s #1436 under review proposes Kunlunxin’s distributed TLE backend (newly opened 10-25); if merged, it would be Kunlunxin’s first distributed capability at the TLE layer.
  • Delivery: Kunlunxin among the nine chips is the Express version (W8A8-kunlunxin-FlagOS-Express), listed alongside NVIDIA, Ascend, and DAMO XuanTie.
  • Assessment: Kunlunxin is the backend with the highest density of operator-side fixes this period, almost all concentrated on “existing operators that don’t run or run slowly”—consistent with the timing of its just having become FlagTree’s seventh backend last period; a long tail of patching inevitably follows backend onboarding.

3.3 DAMO XuanTie: Zhenwu Express Version Delivered, PPU Sparse Attention Under Review (10-23 ~ 10-25)

Date: 2026-10-23 ~ 2026-10-25　Source: FlagRelease model organization · FlagGems-vllm PR #975 · FlagAttention PR #111 · FlagBLAS PR #154

  • Model delivery: The W8A8-zhenwu-FlagOS-Express of MiniMax-M3.1-Flash lands in the repo on 10-23, one of the four Express versions; the source deployment example given in the model card uses DAMO XuanTie as the baseline platform (vLLM 0.24.0, vllm-plugin-FL 0.3.0, FlagGems 5.4.0, TP=8).
  • Sparse attention: FlagGems-vllm merges the PPU-side flash_mla_sparse_fwd (#975, 10-23 17:19), matching M3.1’s MLA sparse path; FlagAttention’s #111 under review further opens MiniMax sparse attention support on PPU (newly opened 10-24).
  • Operator library expansion: FlagBLAS’s #154 under review, “Add T-Head L1 support” (newly opened 10-24), brings L1-level operators into the cross-chip BLAS.
  • Assessment: DAMO XuanTie appears simultaneously on both sides—”the baseline platform for model delivery” and “a newly added backend for the operator library”—indicating that within FlagOS it serves both as a first-batch validation platform and as a target for filling in operator coverage. The difference between the Express and standard versions (whether a preinstalled runtime is included) warrants follow-up verification.

3.4 Tsingmicro, Iluvatar, Moore Threads, MetaX: Four Vendors Each Have a Batch of Commits on the Operator Library Side (10-23 ~ 10-25)

Date: 2026-10-23 ~ 2026-10-25　Source: FlagGems PR #6623 · FlagGems PR #7454 · FlagGems-vllm PR #893 · TransformerEngine-FL PR #148

  • Tsingmicro: The W8A8-tsingmicro-FlagOS standard version among the nine chips lands in the repo on 10-23 14:39; there are no repo-specific merges on the code side within the window, so it remains primarily model delivery.
  • Iluvatar: The nine-chip standard version lands in the repo; Torch-FL’s #644 under review fixes non-inner reduction to avoid masked row blocks (newly opened 10-23); sglang-plugin-FL’s #139 under review adds empty runtime adaptation for SGLang 0.5.18.
  • Moore Threads: FlagGems merges TLE warp specialization for FP8 matrix multiplication (#6623); FlagGems-vllm fixes out-of-order handling in the narrow-value band of top_k_per_row_prefill and optimizes PH1’s FP8 bmm (#831, #893); FlagTree’s #1401 under review proposes a mixed FP8/BF16 SQMMA pipeline on PH1.
  • MetaX: FlagGems fixes scaled_mm case collection and and mode, and adds convolution backward (#7248, #7454, #7016); build-infra’s 2.3.0 changelog records maca 3.8.1.3 in the build list.
  • Others: TransformerEngine-FL’s #148 under review fixes generic_gemm’s alpha loss, ignored beta, and incorrect 3D transpose restoration (10-23); FlagScale’s #1315 under review proposes L0-to-L4 capability planning and test routing for full nightly runs.
  • Assessment: The common trait of the four vendors is “model repos first, operator fixes after,” consistent with the paths of Kunlunxin and Hygon. The real threshold for nine-chip delivery is not getting model repos published, but whether each vendor’s runtime matrix can be continuously maintained over the following weeks.

IV. Summary and Trend Observations

  • Day-0 delivery enters a phase of batch production: Within one week, GLM-5.3-Flash nine-chip and MiniMax-M3.1-Flash nine-chip were released simultaneously on the same day in two consecutive rounds, and this round is unified to a single W8A8 path with four Express versions. The replicability of delivery has been established; the next observation points are “whether the same format is stable across different models” and whether the model card version matrix is updated in sync with upstream upgrades.
  • 2.3.0 is in a suspended period of “authorized but unreleased”: All four items in build-infra—gating, changelog, rebuild authorization, and version parameterization—are in place, but the tag has not yet been cut. Unlike before the 2.2 release, this round makes “selecting component versions at container startup” a formal capability, meaning the runtime is decoupled from the operator library and compiler versions; in the long run this will change the granularity of adaptation and validation.
  • Organizational activity is highly concentrated in the quantum stack: FlagQuantum alone accounts for 82.5% of commits and 54% of merges. This concentration brings rapid structural reorganization (QEC package split, Quafu SDK switch) but also causes a marked decline in the organization’s “non-quantum side” throughput—daily average merges fell from 163 to 91, with the main gap coming from the decline in FlagGems and FlagGems-sglang.
  • The competition track becomes the main channel for operator supply: The vast majority of FlagGems-sglang’s 34 merges come from external contributors’ Competition-Track1, with 30 merges possible within two hours. Supply is fast and review is concentrated; filling in test contracts relies on subsequent batches, and the long-term quality of this channel needs observation of defect regression rates.
  • Vendor-side fixes enter a long-tail period: The actions of Kunlunxin, Ascend, MetaX, and Moore Threads this period are mainly “fixing existing operators until they work,” plus one rollback of a mistakenly ported CPU operator. This is an inevitable stage after backend onboarding, and it also shows that 2.2’s list of 1,454 operators still has coverage and precision gaps on real chips.
  • The information landscape is relatively quiet: Of 44 news candidates, only 3 are valid; there are no new version releases and no new repository creations (the new repos were all created between 10-13 and 10-14). The main body of this period’s content comes from GitHub, a typical “code active, launches silent” window.
  • Limitations: This period’s commit retrieval uses GitHub search’s total_count basis (612 commits), deduplicated by commit URL and assigned to repos one by one; individual repos may have a ±1 error due to cross-page duplication; FlagQuantum’s 505 includes merge commits and branch sync commits and cannot be equated with 505 functional changes; FlagRelease timestamps are Hugging Face’s UTC records, converted to Beijing time; expressions such as “Day-0” and “first” in vendor press releases are company statements and have not been verified by third parties; InfoQ’s cost figures are estimates converted from rental fees, not measured comparisons.

Appendix: Source Verification Table and Full Source List

Source Verification Table

Source Verification Result
GitHub org repositories API All 61 repos returned; 16 repos had pushes within the 72-hour window
GitHub commit search 612 commits (pages 6–8 added after the 5-page cap); deduplicated by URL to 11 repos
GitHub merged PR search 274 merged within the window, led by FlagQuantum with 148
GitHub open PR search 253 updated within the window, of which 141 newly opened
GitHub org event stream 99 events: 50 PRs, 20 pushes, 15 branch deletions, 8 branch creations
Release and Tag atomic check Zero new entries across all 31 repos; no formal releases within the 4-day window
Atom fallback Supplementary checks on docs, FlagBLAS, FlagSparse, Trident, and release-info; all landed on non-default branches
FlagRelease model org Most-recent-update check on 60 repos; 9 new MiniMax-M3.1 repos and 2 new MiniCPM-V 4.7 repos within the window
Hugging Face model card MiniMax-M3.1-Flash multi-chip documentation published with the repo on day one; nine-chip list and Express rules verifiable
Google News RSS 44 candidates from 24 Chinese/English queries; 3 valid (via proxy)
HN Algolia 36 hits over 4 days from 8 queries; no direct title matches
CSDN FlagOS column Latest post is the 10-22 livestream preview; no new posts within the window
BAAI Community Search page is client-rendered; only the shell page was obtained, not used this issue
Pending-inclusion queue The day’s file contains only RISC-V entries, already consumed; no designated entries for this topic

Full Source List