Research window: 2026-10-22 06:00 ~ 2026-10-23 06:00 (Beijing time, 24 hours; Friday morning report, window continues from the cutoff of the previous daily report).

Sources: GitHub (full verification of 61 repos under org: flagos-ai, 135 commit searches, 163 merged PRs and 183 open PRs searched, 100 org event stream entries, atomic verification of Releases/Tags across 31 repos, Atom fallback for 4 repos), Google News RSS (24 sets of Chinese and English query terms, via proxy), HN Algolia (8 sets), CSDN FlagOS column, BAAI Community, Embodied Home and Pandaily original articles (see appendix source list for details).

This Issue’s Index

  • Today’s Highlights: 163 merges landed, a new high for the past week; Hygon’s vLLM 0.28 and SGLang 0.5.18 dual stacks merged on the same day, with FEP-0140 and FEP-0141 each delivering their first milestone; FlagQuantum moves M3 neutral atoms from design contract to runnable native Rydberg dynamics (10-22)
  • I. Open Source Project Progress (GitHub Activity)
    • 1.1 Organizational cadence: 16 repos pushed, 135 commits, 163 merges; the queue is clearing while new additions slow (10-22)
    • 1.2 Hygon’s vLLM 0.28 and SGLang 0.5.18 lines merged on the same day (10-22)
    • 1.3 FlagQuantum: 53 commits, 20 merges; native Rydberg goes from contract to code (10-22)
    • 1.4 FlagQuantum: deployment rejection, vendor exit, and terminal sampling proposal (10-22)
    • 1.5 FlagGems: 91 merges; 39 KernelGen batch landings run in parallel with 13 Kunlunxin optimizations (10-22)
    • 1.6 FlagGems test mainline: lukatao with 61 commits, opening a 10-commit batch overnight to switch to “direct-connect candidates” (10-22 ~ 10-23)
    • 1.7 build-infra: Kunlunxin becomes FlagTree’s seventh backend; flagcx 0.14.0 pinned across all backends (10-22)
    • 1.8 Torch-FL: Tsingmicro hooks up rocprofiler-sdk; Kunlunxin cross-card copies switch to peer primitives (10-22)
    • 1.9 FlagTree: AMD RDNA gains the prefill path; MUSA caches TME per copy (10-22)
    • 1.10 Other repos: FlagBLAS Iluvatar and Moore Threads GEMM, two competition-channel commits, optest packaged as a wheel (10-22)
  • II. News Coverage and Ecosystem
    • 2.1 Pandaily gives an English systematic account of FlagOS 2.2: 1,454 operators, ~27% cross-chip improvement, 765 new KernelGen operators (10-22)
    • 2.2 Crossdim Intelligent selected for the Zhongzhi FlagOS Acceleration Program proposed projects: FlagOS-Robo and AlohaMini on-device demos (10-22)
    • 2.3 Channel verification: 17 candidates, 2 valid; CSDN adds a university roundtable livestream; BAAI Community yields only a framework page (10-22)
  • III. Member Units and Backend Vendor Deep Dive
    • 3.1 Hygon: two inference plugin repos complete upstream version alignment on the same day (10-22)
    • 3.2 Kunlunxin: 13 operator optimizations, plus FlagTree’s seventh backend (10-22)
    • 3.3 Tsingmicro: device timeline enters torch.profiler, measured on TX8110 (10-22)
    • 3.4 Moore Threads and Enflame: MUSA cache persistence, GEMM, and a full Enflame batch update (10-22)
    • 3.5 Ascend, Iluvatar, MetaX, and others: small steps split by backend; Horizon and Cambricon silent (10-22)
  • IV. Summary and Trend Observations
  • Appendix: Source verification table and complete source list

Today’s Focus: 163 merges hit a new high for the past week; Hygon dual-stack aligned on the same day, quantum stack pushes M3 from contract to runnable (10-22)

Date: 2026-10-22　Sources: vllm-plugin-FL PR #576 · sglang-plugin-FL PR #138 · FlagQuantum PR #700 · build-infra PR #1468 (see appendix for full list)

  • Cadence: 16 of 61 repos had pushes in the window, 135 commits retrieved, 163 PRs merged, and 183 open PRs updated in the window (90 of them newly opened). Compared with the previous issue (10-21: 22 repos, 164 commits, 151 merges, 154 open PRs, 64 newly opened), merges rose 8%, open PRs rose 19%, and newly opened rose 41%, while pushed repos fell 27% and commits fell 18% — the queue is clearing and new development is tapering off.
  • First realization on the version front: Hygon’s adaptations for the two upstream versions, vLLM 0.28.0 and SGLang 0.5.18, were merged on the same day. This is the first empirical evidence of “landing cell by cell per the FEP matrix” after FEP-0140 (vLLM three-version line) and FEP-0141 (SGLang 0.5.18, ten vendors) were merged on 10-21.
  • Quantum stack crosses the design stage: FlagQuantum saw 53 commits and 20 merges. Three pieces landed the same day: native Rydberg programs on the Core side, plan 1.7 dynamics on the Simulation side, and moving-atom pulse training on the Examples side. The neutral-atom route that was still two design contracts yesterday now has a runnable CPU path and acceptance numbers today.
  • Seventh backend on the build side: build-infra connected Kunlunxin (XPU) to the FlagTree build line and the daily build row, making it the seventh backend after enflame, hcu, tsingmicro, and mthreads. The PR describes itself as “the last row in the current set.” On the same day, flagcx 0.14.0 was pinned from an nvidia-only dependency to an explicit dependency for all backends.
  • Test infrastructure overhauled in parallel: optest went from a collection of scripts to an installable wheel with console commands. On the FlagGems side, one person merged 61 PRs, including opening 10 batch PRs in one burst from 23:40 to 23:47, changing test cases from wrapper functions to directly calling operators or injecting candidates.
  • Two valid news items in this window: English-language outlet Pandaily systematically relayed 2.2; domestically, a government acceleration program project case for FlagOS-Robo appeared. These two items outside the software stack are the only information gains in this window that do not come from GitHub.

I. Open-Source Project Progress (GitHub Activity)

1.1 Organizational Pace: 16 Repos Pushed, 135 Commits, 163 Merges — Queue Draining, New Additions Slowing (10-22)

Date: 2026-10-22　Source: flagos-ai org repositories · Commit search · Merged PR search

  • Repo surface: 16 of 61 repos had pushes in the window. By commit count: FlagQuantum 53, FlagGems 29, build-infra 13, Torch-FL 12, FlagGems-sglang 8, FlagTree 5, FlagGems-vllm 4, FlagBLAS 3, optest 3, FlagTrain 2, FlagOps 2, FlagDNN 1. Pushes to docs, release-info, sglang-plugin-FL, and vllm-plugin-FL landed on non-default branches; no new commits on their main branches.
  • Merge surface: 163 merged PRs, split as FlagGems 91, FlagQuantum 20, build-infra 13, Torch-FL 12, FlagTree 6, optest 4, vllm-plugin-FL 4, FlagGems-vllm 4, FlagGems-sglang 3, FlagTrain 2, FlagBLAS 2, FlagOps 1, sglang-plugin-FL 1. FlagGems and FlagQuantum together account for 68%.
  • Review surface: 183 open PRs updated in the window, 90 of them newly opened. By repo: FlagGems 86, FlagGems-vllm 18, Torch-FL 13, vllm-plugin-FL 12, FlagTree 11, FlagTrain 6, FlagGems-Experimental 6, sglang-plugin-FL 5. New additions in FlagGems-vllm and TransformerEngine-FL cluster around vendor-side fused operators.
  • Throughput surface: lukatao merged 61 PRs in FlagGems (67% of that repo), all tests and test-case contracts; the FlagQuantum account merged 20; tengqm handled all 13 in build-infra; lvyufeng merged 11 in Torch-FL; lvxu2020 merged 6 on the Kunlunxin XPU line.
  • Release surface: no new releases in the window. The three most recent tags remain FlagTree’s 0.7.1.dev1 and 0.7.1.dev1+ppu3.6 (10-20 20:11) and 0.7.1a1+ascend3.5 (10-19 13:01), all covered in earlier issues.
  • Event surface: 100 org events — 43 PR events, 27 pushes, 12 branch deletions, 9 branch creations, 4 comments, 3 reviews, 2 follows. The 12 branch deletions coincide with the same-day batch of newly opened PRs, reflecting the “merge batch branch, then delete” pipeline habit rather than any functional rollback.
  • Assessment: Merges, open PRs, and new PRs all rising while commits and pushed repos fall is a rare combination this quarter. It means review throughput is working through the backlog from the prior two days (roughly 300 merges across 10-20 and 10-21) while developers’ newly written code shrank that day. This rhythm typically appears around milestone close-out.

1.2 vLLM 0.28 and SGLang 0.5.18 Hygon Lines Merged the Same Day (10-22)

Date: 2026-10-22　Source: vllm-plugin-FL PR #576 · sglang-plugin-FL PR #138 · vllm-plugin-FL repo · sglang-plugin-FL repo

  • vLLM side (#576, 19 files, +1436/−288): Upgrades the Hygon BW1000 plugin to vLLM 0.28.0, with distribution identifier 0.28.0+empty, module version 0.28.0, and source baseline 2cf0a6915. Validation environment: 64 GiB per card, ordinary wheel install inside the container (no editable install), TP=2, max model length 4096, max sequences 8, memory utilization 0.85, with both eager and FULL_AND_PIECEWISE graph modes run once each; communication goes through the vendor HIP/RCCL, with FLAGCX_PATH unset.
  • Version puzzle: PyTorch uses vendor 2.10.0 (+das.opt1.dtk2604, DTK 26.04 retained), FlagTree is 0.6.0+hcu3.6 (wheel SHA256 prefix 0fd81f0e), Triton distribution 3.6.0+gitc73250c4.staging, coexisting with the vendor Triton; runtime image vllm-plugin-fl:v0.28.0-hygon-ci.
  • Comparability: The repo compared all 1,944 installed FlagGems source and package files one by one; all matched commit e12a220 (only CRLF/LF line-ending differences), but the version in the install metadata is still 0.1.0 — i.e., the version number is untrustworthy while the contents are verifiable. This “content instead of VCS metadata” forensic approach has recurred in recent issues.
  • SGLang side (#138, 65 files, +4940/−369): Upgrades the Hygon BW1000 empty backend to SGLang 0.5.18 (tag source 71de97b, plus an HCU-specific Quark import patch), adapts the attention, FLA, and MoE interfaces, and fixes coordinated exit under pipeline parallelism. Validation covers single-node TP2 eager and full-decode graphs, plus physical two-node TP4/PP1 and TP2/PP2 eager cases; the pipeline gate uses BF16, context 4096, max concurrency 16, memory ratio 0.70.
  • Version puzzle: FlagTree 0.6.1+hcu3.6 (Triton provided by FlagTree, no separate standalone Triton), FlagGems 5.4.0.dev0, native FlagCX 0.13.0, vendor sglang-kernel 0.4.2.post2, flash-attn 2.8.3; CI image sglang-plugin-fl:0.5.18-hygon-ci-20261015, pinned by sha256.
  • Assessment: Both PRs follow the “empty runtime + vendor stack” route, and acceptance is written as specific version numbers plus specific graph modes rather than vague phrasing like “adapted.” Per FEP-0140, vLLM 0.28 is the main November release targeting ten vendors; per FEP-0141, SGLang 0.5.18 covers ten vendors with a mid-December node. Hygon is the first cell lit, which does not mean the other nine are in place; the next thing to watch is whether the same 0.28.0 version reuses the same install path on Tsingmicro, MetaX, Enflame, and Kunlunxin.

1.3 FlagQuantum: 53 Commits, 20 Merges — Native Rydberg Moves from Contract to Code (10-22)

Date: 2026-10-22　Source: FlagQuantum commits · PR #700 · PR #707 · PR #714

  • Totals: 53 commits, 20 merges — 40% of the org’s commits and second in merges. Compared with the prior issue (84 commits, 34 merges) the scale has halved, but the nature has changed: the prior issue was dynamic-circuit Program IR and plotting-chain completion; this issue is neutral-atom physics moving from documentation into execution.
  • Core frontend (#700, 22 files, +2198/−16): Native Rydberg control no longer borrows circuit adaptation; Core provides the frontend directly on ProgramRecord. Records gain typed context and control fields; the existing validator accepts only one physical profile and reuses CFG/SSA checks; continuous-path safety is decided by exact arithmetic on encoded coordinates, decoupled from numerical evolution; source encoding reuses the existing scalar codec, and native-specific strict fields and canonical checks reject illegal input before any tensor decoding. No new IR layer, binder, solver, registry, or root export is introduced.
  • User API: RydbergProgram is constructed from atoms, sites, length and time units, C6, loss rate, minimum spacing, transport channel, and drive channel, and exposes three actions: move, pulse, to_ir. The example output shows atom identifiers ('a','b'), dimensions (3,3), controlled position (3.0,0.0), and survival operator shape (9,9). The PR explicitly states that “a controlled position does not imply physical presence.”
  • Simulation (#707, 19 files, +1488/−188): Native Rydberg programs can go through the existing Lindblad plan, run, and initial-density adjoint entry points; the user declares atoms, linear transport, pulses, and absorption loss, and Simulation assembles the interval matrices itself; plan 1.7 is sealed to exactly seven outer fields, and the source is not recompiled at runtime. The experimental numerical path is CPU-only, with one to two g/r/lost roles, and larger scales are rejected before exponential memory allocation; geometry is an interval-midpoint approximation of the applied linear path, with grid-convergence evidence recorded separately from solver accuracy.
  • Examples (#714, 3 files, +217): Trains two pulse amplitudes as bindings and moves an atom pair; the measured output over 40 steps and 128 intervals is: unconditional RR rises from 0.0431 to 0.1228, survival-conditioned RR 0.1500, no-flag selection RR 0.1439, and exact numerical replay holds. The local default full run passes 14,584 and skips 167 in about 518 seconds; the first round at 64 intervals failed one gradient at 2.28e-10, and after refining to 128 intervals it passed without changing the solver or assertions.
  • Assessment: Within a single day, the quantum stack connected three stages — “can declare atoms and pulses,” “can compute dynamics,” and “can train control parameters” — and each stage states its capability boundary (no claims of sampling events, feedback, heating, quantum motion, GPU, or distributed execution, nor of M3 completion). This is the most informative single-repo progression this quarter: write the contract as an implementation that can reject, then open it up block by block.

1.4 FlagQuantum: Deployment Rejection, Vendor Retirement, and a Terminal-Sampling Proposal (10-22)

Date: 2026-10-22　Source: PR #701 · PR #705 · PR #716 · PR #720

  • Deployment-side rejection (#701, 3 files, +78/−1): Native physics programs are not digital circuits; the package builder previously read circuit metadata from ProgramRecord and raised AttributeError, while the Pauli package builder raised a directionless TypeError. Now both entry points hand off to Core’s rejection logic before backend selection, compilation, and emission, uniformly raising CapabilityError with the message “native Rydberg timelines cannot be executed as circuits, use flagquantum.lindblad.” Four new regressions all failed before the fix and, after it, 39 tests pass on each of three Python versions.
  • Vendor retirement (#705, 17 files, +159/−621): The generic NeutralAtomProvider never had a corresponding external service or task protocol; it only parsed local geometry and always rejected submission. Per proposal 082, the module and the two Remote namespace exports are deleted outright — no aliases, no empty-shell adapters; Core’s geometry, RydbergProgram, and the legacy plan/source firmware remain unchanged.
  • Terminal-sampling proposal (#716, 4 files, +379): Following #707, proposal 083 defines Runtime’s sample_terminal primitive — consuming ordered full-space tensor Kraus branches, reusing SuperOperator, the existing density checks, the current MeasurementResult, Core tensor encoding, and the Torch random source. The example gives existence labels ('no_flag','flag') with probabilities 0.68/0.32, and Fock-number labels 0/1/2 with probabilities 0.6/0.3/0.1, ending with an explicit print of “Framework terminal instrument API: proposed, not implemented.” The PR body states that proposal 083 is neither approved nor implemented.
  • Other branches: #710 installs Circuit methods when registering custom operators; #711 rejects non-unitary matrices in the Circuit adjoint; #712 preserves extremely small nonzero gates exactly (no threshold folding to zero); #713 audits dynamic-circuit promotion readiness; #720 covers measurement capacity variation with rank and representation-consistency intervals; #721 makes control instructions carry their own operands; #722 calibrates engine ordering under an injected clock, eliminating intermittent failures.
  • Assessment: Half of this issue’s quantum-stack merges went into “rejection” and “deletion” — rejecting packaging physics programs as circuits, deleting a vendor with no external service, and freezing an unapproved sampling interface. Such actions add no capability, but they determine whether M3’s boundaries will be credible later.

1.5 FlagGems: 91 Merges — 39 KernelGen Batches Landed Alongside 13 Kunlunxin Optimizations (10-22)

Date: 2026-10-22　Source: FlagGems commits · PR #7077 · PR #7107 · PR #7424

  • Totals: 29 commits, 91 merges — 56% of the org’s merges. Counting the org’s 163 merges by title keyword (overlapping): tests 47, KernelGen 39, Kunlunxin 13, Ascend or NPU 9, Hygon or DCU 7, Enflame or GCU 5, Moore Threads or MUSA 5, CI 4, MetaX 3; within the FlagGems repo itself, Kunlunxin 10, Ascend 7, Moore Threads 4, Enflame 2, Hygon 2.
  • KernelGen batch landing: 14 Nvidia operators merged in three batches; the timestamp density within each batch indicates group merges after review approval rather than one-by-one review.
  • 10:43 batch: _copy_from_and_resize, ger, sparse_bsc_tensor; _nested_tensor_from_tensor_list.
  • 15:23 batch: _values_copy, _fw_primal_copy, _shape_as_tensor; _nested_tensor_storage_offsets, _convert_indices_from_csr_to_coo.
  • 22:23 batch: swapdims, _nnz, moveaxis, _dimI, and view_as_complex_copy.
  • Enflame whole batch (#7077, 26 files, +3520/−511): The vendor’s 10-13 batch update enters main in one go; the title says only “update from enflame 20261013,” and the PR body notes only Operator plus “bug fixes and performance optimization,” with no itemized detail. This is one of the largest single vendor-side changes in code volume in the past week.
  • Kunlunxin fused MoE (#7107, 13 files, +496/−123): Completes XPU3’s fused_experts_impl, inplace_fused_experts, and outplace_fused_experts operators plus dispatch_fused_moe_kernel; the first three have aggregate scores of 1.327, 1.329, and 1.324 respectively (bf16 mean 1.346 to 1.351, fp16 mean 1.302 to 1.306). The PR proactively notes two caveats: first, the official contract baseline is vLLM’s own fused_experts_impl, which cannot be built on the XPU stack, so Kunlunxin compares only against a substitute non-contract baseline (per-expert index_select plus matmul), meaning the three numbers can only be read as “fused beats non-fused”; second, dispatch_fused_moe_kernel aggregates 0.626, below the 0.8 threshold, and no compliance is claimed.
  • Three CI items: #7424 disables flagcx to fix a cuda12 dependency error (mm_w8a8_fp8 failing on the nvidia133 backend); #7500 fixes a misplaced environment variable; #7420 raises the robust-checkout timeout to 60 seconds.
  • Assessment: Fewer than 20% of the 91 merges actually add operator capability; the bulk is automated output (39) and test contracts (47). The Kunlunxin line has entered the stage of “grinding item by item against benchmark aggregate scores” and has begun proactively flagging baseline comparability flaws — which is more noteworthy than the numbers themselves.

1.6 FlagGems Test Mainline: lukatao’s 61 Merges, 10 Overnight Batches Converting to “Direct Candidates” (10-22 ~ 10-23)

Date: 2026-10-22 ~ 2026-10-23　Source: PR #7543 · PR #7552 · PR #7556 · optest repo

  • Scale: lukatao alone merged 61 PRs — 67% of FlagGems that day and 37% of the org; 56 of them are titled as tests, fixes, validation, or sync, and none adds an operator.
  • Batch opening: Between 23:40 and 23:47 on 10-22, ten PRs were opened in seven minutes — the foreach override “direct routing” batches 01 through 09 (#7543 to #7551) plus #7552, “convert the last nine operator suites to the common candidate API.” These changes move test cases from use_gems() wrapping to directly calling flag_gems.* or injecting candidate implementations — making “which implementation is under test” explicit rather than implicit.
  • Overnight merges: The window’s last four sparse-suite ports landed back-to-back in the early morning — #7553 (01:00, sparse log-softmax portable across backends), #7554 (02:51, sparse validator firmware and direct baseline candidate calls), #7555 (04:38, compressed sparse validator), #7556 (05:47, common sparse block constructor). The last two landed less than half an hour before this report’s cutoff.
  • Backend-skip governance: Ascend and Moore Threads skips are each documented with reasons and restricted input domains (#7483 linalg_vander complex input, #7485 logdet complex, #7492 row_stack_out memory format, #7496 trapz complex32, #7502 orgqr MUSA zero columns, #7503 and #7504 MUSA qint32, #7505 Hygon cuDNN validation), while on the Hygon side #7460 fixes the input firmware for FP8 sparse-sum backward.
  • Assessment: This line produces no external capability, yet it is the foundation of FlagOS’s multi-backend credibility — the same PyTorch test case must yield an explainable pass or skip across a dozen-plus backends, rather than each maintaining its own modified tests. optest that day also packaged its toolchain as an installable wheel (#4), moved to a src layout (#5), and exposed console commands (#6) — two ends of the same effort as FlagGems’ test-case rework.

1.7 build-infra: Kunlunxin Becomes FlagTree’s Seventh Backend, flagcx 0.14.0 Pinned Across All Backends (10-22)

Date: 2026-10-22　Source: PR #1468 · PR #1471 · PR #1459 · PR #1462

  • Totals: 13 commits, 13 merges, all by tengqm — the most concentrated platform-side repo of the period.
  • Seventh backend (#1468, 3 files, +428/−9): packaging/flagtree/kunlunxin uses the same two-stage Containerfile shape as recent backends — --target builder is a publishable build environment (bare ubuntu 22.04 plus apt toolchain, with prebuilt inputs staged into the FlagTree offline cache), and the final stage builds the wheel on top. Kunlunxin has five unique constraints: first, ten prebuilt inputs with cache matched by directory name, where two LLVM 19 packages share the tarball root xtdk-llvm19-ubuntu2004_x86_64 and land as xtdk-llvm19 and xtdk-llvm19-printf, so filestore names carry version suffixes, and only the triton toolkit, rooted at .triton/, needs --strip-components; second, the frontend is selected by environment variable, LLVM_SYSPATH must remain unset, and the common LLVM is the validated branch while XTDK is the fallback; third, pybind11 is pinned exactly to 3.0.1, since 3.0.4 changed internals construction and would SIGSEGV the dispatcher; fourth, it does not use apt’s patchelf but resolves it from PATH or the copy bundled in the common LLVM package, matching the vendor CI path; fifth, it does not add TRITON_APPEND_CMAKE_ARGS=-DCMAKE_BUILD_TYPE=Release, because the vendor wheel Kunlunxin ships is itself rel-with-asserts, and for an external compiler the optimization level is not a packaging detail.
  • Communication dependency (#1471, 3 files, +60/−4): flagcx==0.14.0 was previously pinned only in the nvidia-cuda12.8 and nvidia-cuda13.3 rows, while the other eighteen backends still resolved from triton/_C. This change adds exact pins to the remaining eighteen, with tags taken from the value actually served by the vendor index rather than derived from the backend key (hygon-dtk26.04 publishes +dtk2604); spacemit and thead-ppu2.0.0 are not pinned because neither index has a flagcx wheel. The same PR also fixed two documentation descriptions that had become stale as a result.
  • Documentation line: Design records and site pages for eight components — vllm-plugin-FL, FlagTree, FlagCX, FlagGems, FlagLibs, Megatron, SGLang, verl — merged continuously between 12:50 and 17:42 (#1462 to #1470), the first time this quarter that “build design” has been written up as searchable site content.
  • Other: #1459 removes the stale vendor-prefixed hygon wheel row; #1461 lets callers narrow the manifest download mode.
  • Assessment: The builder expands from six backends to seven, and on the same day the communication library goes from “a special case in two nvidia rows” to an explicit dependency for all backends. The latter is the more substantive change: it determines whether the communication layer still follows the same install and symbol-resolution path when switching backends.

1.8 Torch-FL: Tsingmicro Connects rocprofiler-sdk, Kunlunxin Cross-Card Copy Moves to Peer Primitives (10-22)

Date: 2026-10-22　Source: PR #630 · PR #634 · PR #632 · PR #629

  • Totals: 12 commits, 12 merges, spanning six platforms: MPS, Kunlunxin, Ascend/Hygon/MetaX/PPU, GCU, and Tsingmicro.
  • Tsingmicro device profiling (#630, 15 files, +1383/−39): On Tsingmicro, torch.profiler previously produced only CPU activity — the platform was routed to an unavailable stub, PrivateUse1 had no registered device profiler, there were no kernel events, no CPU-to-kernel arrows, and self_device_time_total was always 0. This PR adds a rocprofiler-sdk-based DeviceTracer and a standalone profiling tool libtorch_fl_profiler.so, associates each NPU kernel back to the aten op that launched it, and renders in the CUDA trace CPU/device layout; it also measures on TX8110 and pins FLAGOS_BUILD_VENDOR=ON for Tsingmicro (the vendor directory holds a random-number kernel), and completes install and profiling docs. Behavior is unchanged when profiling is not requested.
  • Kunlunxin cross-card copy (#634, 3 files, +55): CrossDeviceMemcpy was calling the same-card-semantics xpu_memcpy (type XPU_DEVICE_TO_DEVICE), which returns −801 when passed pointers on two different cards and does not write the destination, so any flagos:N → flagos:M transfer silently did nothing. It now uses the SDK’s peer primitive xpu_memcpy_peer. The problem was found via the last bert failure on P800; a synchronous call would not mask it, indicating it was not a timing issue but that the bytes were never written.
  • Preload ordering (#632): liblaunch_shared.so reported undefined symbol: cudaMemcpy; that symbol is a versioned definition in /usr/local/xcudart/lib/libcudart.so.12 and only resolvable after the Triton launcher dlopens, so Kunlunxin’s CUDA-compatible runtime is now preloaded earlier.
  • Other: #629 adds a convolution_overrideable exception for cuda/dcu/metax/ppu; #626 keeps Qwen3.5’s metadata view on MPS; #635 moves type conversion onto the device in FlagGems-led CUDA builds; #631 keeps MPS tests on the Apple runner; #618 adds a temporary diagnostic note for GCU capability AssertionError.
  • Assessment: The day’s mainline is not performance but the availability of two foundational capabilities — observability (Tsingmicro can see a device timeline for the first time) and multi-card correctness (Kunlunxin cross-card copy had been wrong all along). Such fixes never appear in any benchmark table, but they force every upper-layer multi-card experiment’s conclusions to be recomputed.

1.9 FlagTree: AMD RDNA Gains a Prefill Path, MUSA Gets Per-Copy TME Caching (10-22)

Date: 2026-10-22　Source: PR #1365 · PR #1385 · PR #1278 · PR #1415

  • AMD prefill (#1365, 66 files, +3163/−260): On top of #1364’s M=1 decode path, adds M>1 prefill execution, including prefill mode for the dense Qwen3 importer, M>1 rendering codegen (with WMMA lm_head), a fused matmul-plus-RMS-norm-stats kernel and gather-reduce normalization finish, per-prefill-token KV writes into independent cache slots, and “prefill emits logits only for the last token” — slicing only the position before lm_head rather than materializing all positions. RDNA’s prefill WMMA GEMM microkernel is 10 to 30 times faster than the GEMV loop at M>1 and is auto-selected by M; on the decode side, split-K cuts lm_head from 17.0 to 14.9 ms/token and per-layer wide projections from 14.9 to 10.5 ms/token. On W7900 (gfx1100) and R9700 (gfx1201), after a fresh compile, prefill is finite and argmax=241 matches the torch reference (max error about 0.5, a bf16 near-tie), and decode next_token=25 is unchanged.
  • Five other items: #1278 fixes fence misplacement across outlined helper calls; #1385 adds per-copy TME cache persistence for MUSA; #1424 disables the 02-sparse-mla case in Enflame CI due to intermittent bus errors; #1415 fixes minimax_m3 index_topk’s block_size_k; #1427 (10-23 00:06) updates Enflame vllm benchmark parameters.
  • Assessment: The AMD line advances from “single-card decode works” to “single-card prefill works,” and the performance numbers are per-commit figures (17.0→14.9→10.5 ms/token) rather than whole-model comparisons, which is relatively verifiable. This line still uses the dense Qwen3 model as its only validation target; MoE and long context are not covered.

1.10 Other Repos: FlagBLAS Iluvatar and Moore Threads GEMM, Two Contest-Channel Items, optest Packaged as a Wheel (10-22)

Date: 2026-10-22　Source: FlagBLAS PR #153 · FlagGems-sglang PR #205 · FlagGems-vllm PR #977 · optest PR #4

  • FlagBLAS (2): #153 optimizes Iluvatar L1-layer operators; #152 adds a Moore Threads GEMM implementation. Both are vendor-side submissions with no cross-repo changes.
  • FlagGems-sglang (3): #205 adds gfx1100 versions of fused_moe_gemm, fused_moe_router_tensorcore, and fused_moe_router_cudacore to the AMD RDNA3 architecture layer (_amd/rdna3/ops/), tuned on W7900D, 3 files +1310; the WMMA kernel accumulates single dot products in fp32 per K block, because accumulating across K blocks with WMMA accumulators loses precision on gfx1100. The other two are FlagOS contest Track1 entries: #204 fused_pack_qkv and #201 fused_sigmoid_mul, both Triton kernels, showing that contest output is starting to enter main rather than stopping at submission artifacts.
  • FlagGems-vllm (4): #977 adds a TP=2 configuration to MetaX fused MoE (Qwen3.6-35B-A3B with w1=(256,512,2048), w2=(256,2048,256)), averaging a 1.065× speedup across 14 M values on C550, and fixes an OutOfResources caused by selecting a 98304-byte shared-memory configuration at M≥4096; it also accepts vLLM’s out, workspace13, and workspace2 to avoid copying the entire output. #936 switches Ascend’s chunk gated delta rule forward to tle.dsa’s slicing and synchronization interfaces; #929 adds qwen_qsa_prepare via KMCompiler; #777 adds variable-length flash attention on Hopper.
  • FlagTrain (2): #16 adds multi_tensor_lion (Nvidia, Hygon, Metax, Thead backends, KMCompiler prefix); #26 adds quick_gelu.
  • optest (4): #4 packages the tool as an installable wheel, #5 moves to a src layout, #6 exposes the installed tool as console commands, #2 makes CI job names show <repo> (<backend>).
  • Worth watching in review: flir #83 adds a TensorView dialect and tile.load / tile.store views (a substantive move toward CommonIR); verl-FL #22 adds Biren SUPA platform support; FlagOS-Compressor #13 adds multi-device MSE quantization and BF16 conversion to the CLI; sglang-plugin-FL #149, opened at 23:36, adds Hygon eager Qwen3.6 MTP decode; TransformerEngine-FL #144 through #146 all target NPU on the same day (get_num_cublas_streams, cuDNN version capability query, bshd/thd layouts).
  • Assessment: These repos are all in the “adding interfaces” stage — flir adds an IR dialect, verl adds a hardware backend, the compressor adds a CLI, and compiled operators spread across four backends. They have not yet

II. News Coverage and Ecosystem

2.1 Pandaily Publishes English Systematic Summary of FlagOS 2.2: 1,454 Operators, ~27% Cross-Chip Improvement, 765 New Operators from KernelGen (10-22)

Date: 2026-10-22　Source: Pandaily report · FlagOS documentation

  • Factual skeleton: 2.2 was released on September 30 and showcased on October 17 at the 2026 Open AI Computing Conference; nine operator libraries total 1,454 operators, with public operators in FlagGems and related libraries rising from 564 to 1,454 (890 new); the new FlagGems-SGLang library contains 40 multi-chip operators covering attention, Mamba state updates, MoE, LoRA, sampling, and quantization; an overall improvement of about 27% across 10 categories of AI hardware and over a thousand operators.
  • Automation scope: KernelGen now supports 9 AI chips and generated 765 new operators this quarter, of which 416 passed accuracy checks on at least 5 domestic chips and reached over 80% of native operator performance; FlagPrism connects Triton source, compiler IR, and device execution data, supporting Ascend, Iluvatar, Moore Threads, NVIDIA, and Enflame.
  • Compression and deployment: FlagOS-Compressor processes Qwen3.5-397B-A17B with W8A8, reducing the model file from 751.41 GB to 382.45 GB (−49.1%), with a GPQA-Diamond score of 84.85%; combined with framework plugins for vLLM, Megatron-LM, SGLang, and others, new models can be adapted to up to 12 chip platforms within one day of release.
  • Legacy compute case: On Ascend 910B, GLM-5.3-Flash’s logical service throughput rose from 8.52k to 17.36k tokens/s (2.04x); China Telecom’s Xing4.0-29B-A4B was adapted to 10 chip platforms, with first-token latency on long-input tests dropping 19.87% versus native operators (this figure appears in public reporting for the first time).
  • Limitations: BAAI itself notes the problem is one of timing—over 80% of deployed compute is not the latest generation, while models iterate quickly; all figures in the article come from BAAI’s own testing, and real service performance still depends on workload.
  • Assessment: This is the first English systematic summary of 2.2, consistent in framing with domestic coverage; the only substantive addition is the 19.87% latency figure. Its significance for overseas readers exceeds its informational value to the community: it turns 2.2 from a launch event in Chinese technical circles into English material that can be cited externally. The earlier 10-20 report already broke down 2.2’s gains into verifiable cases, so this item does not repeat the figure comparison.

2.2 Crossdimension Intelligent Selected for Proposed Project Under the Zhongzhi FlagOS Acceleration Program: FlagOS-Robo and AlohaMini On-Device Demonstration (10-22)

Date: 2026-10-22　Source: Jushen Home report · FlagOS-Robo documentation entry

  • Project selection facts: In September, the Beijing Municipal Science and Technology Commission and the Zhongguancun Science Park Management Committee issued a public notice of proposed projects for the 2026 “Central Guidance for Local” and “New Generation Information and Communication Technology Innovation” special programs under the Zhongzhi FlagOS Acceleration Program; the project “On-Device Deployment and Application Demonstration of AlohaMini Embodied Intelligent Robot Based on FlagOS-Robo,” submitted by Crossdimension Zhixin (Beijing) Robotics Technology Co., Ltd., a subsidiary of Crossdimension Intelligent, was included in the public list.
  • Project content: Aimed at open-source algorithm reproduction for embodied intelligent robots, deployment on real hardware, on-device adaptation to domestic AI chips, and scenario application validation, the project relies on the AlohaMini open-source robot and the FlagOS-Robo toolchain to carry out model training adaptation, multi-chip inference deployment, integrated fast-and-slow system operation, and multi-scenario demonstrations, with the goal of forming a reproducible, deployable, evaluable, and replicable open-source solution.
  • Acceptance criteria: On the model side, embodied model training adaptation and inference deployment, advancing domestic AI chip application on robot devices, and validating cross-chip performance through multi-chip inference accuracy consistency tests; on the system side, coordinating embodied models, motion-control cerebellum, and body control to connect understanding, planning, and execution; on the scenario side, building a multi-scenario physical evaluation system.
  • Background: Crossdimension Intelligent was already listed as one of the new partners in 2.2’s ecosystem framing and also appeared in the embodied intelligence sub-forum lineup previewed on 10-13. What distinguishes this item is that it is a project selection combining four elements—”government special program—open-source toolchain—open-source hardware—evaluation system”—rather than a forum appearance.
  • Assessment: By putting FlagOS-Robo and domestic chip on-device work into the same task statement, the acceleration program effectively establishes an external acceptance authority for the embodied intelligence direction. For the community, this is the third external project with deliverable constraints (the first two being the FEP matrix and the competition), and it is worth tracking whether chip models and accuracy consistency results are subsequently made public.

2.3 Channel Verification: 2 Valid Items Out of 17 Candidates, CSDN Adds University Roundtable Livestream, BAAI Community Yields Only a Framework Page (10-22)

Date: 2026-10-22　Source: Google News RSS · CSDN FlagOS column · HN Algolia

  • Query scope: 24 Chinese and English query terms; component names (FlagOS, FlagGems, FlagScale, FlagTree, FlagPerf, FlagAttention, FlagCX, KernelGen) over 14 days, and member and industry terms (BAAI open source, BAAI chips, domestic compute open-source software stack, Enflame, MetaX, Moore Threads, Qingwei, Hygon, etc.) over 7 days, yielding 17 hits in the window.
  • Two valid items: Pandaily’s English summary of 2.2 and Jushen Home’s FlagOS-Robo project selection article (see 2.1, 2.2). The other 15 are market, funding, and talent pieces, including stock pages and sci-tech innovation pioneer cases for Enflame and Qingwei, Huixi Intelligent’s funding, Moore Threads “falling below IPO price” and domestic compute earnings reports, and a BAAI Community repost of a Jensen Huang compute cluster piece—none touching components, versions, or chip adaptation.
  • Channel verification: Among eight HN Algolia queries, FlagOS returned 4 hits and FlagGems 2, none with directly matching titles; the CSDN column homepage had 51 links, with the latest original article still the 08-28 GLM-5.3-Flash Day0 adaptation piece, but a new 10-22 19:00 university roundtable livestream was added (“Building an Open AI Education Ecosystem Together,” created 10-22 14:24), covering teaching implementation by university faculty from multiple countries under the FlagOS Global AI Open Computing Faculty Development Program—a community event rather than a technical release; the BAAI Community search page is client-rendered, yielding only a framework page.
  • Gap note: The news side of this window is supported by two external articles, one of which is an English summary of an older release, so the “technical framing” still comes entirely from GitHub. Per collection discipline, this satisfies the requirement of “not judging calm from the news side alone,” but it should not be taken as evidence that external communications are accelerating.

III. Deep Dive into Member Units and Backend Vendors

3.1 Hygon: Two Inference Plugin Repos Complete Upstream Version Alignment on the Same Day (10-22)

Date: 2026-10-22　Source: vllm-plugin-FL PR #576 · sglang-plugin-FL PR #138 · FlagGems PR #7460 · FlagDNN commits

  • Dual stack: vLLM 0.28.0 and SGLang 0.5.18 were merged on the same day, totaling 84 files and a net increase of roughly 5,700 lines — the largest vendor-side investment by code volume for the day. Both were submitted by physics31415926, and both were validated on the same single-card 64 GiB BW1000 cluster.
  • vLLM side highlights: The release package is 0.28.0+empty, uses ModelRunnerFL with the V2 model runner disabled; graph mode covers eager and FULL_AND_PIECEWISE; the plugin wheel is rebuilt by CI from the PR merge ref to replace the stale artifact in the image.
  • SGLang side highlights: Beyond single-node TP2, it ran TP4/PP1 and TP2/PP2 across two physical nodes, and fixed coordinated exit under pipeline parallelism; FlagGems 5.4.0.dev0 and FlagCX 0.13.0 serve as the baseline, with no standalone Triton introduced.
  • Other: FlagGems #7460 fixes the input firmware for Hygon FP8 sparse-sum backward; FlagDNN has one “fix for hygon” commit; build-infra #1459 removes the outdated vendor-prefixed hygon wheel line (indicating packaging has converged on unified naming).
  • Assessment: Hygon is the only vendor in the period to complete upstream version alignment in both inference plugin repos simultaneously, with effort concentrated on “version matrix + graph mode + multi-node parallelism” rather than operator count. Its reusable value lies in codifying the empty-backend upgrade process as a template with a version table, which other vendors can follow.

3.2 Kunlunxin: 13 Operator Optimizations, Plus FlagTree’s Seventh Backend (10-22)

Date: 2026-10-22　Source: FlagGems PR #7107 · FlagGems PR #7462 · build-infra PR #1468 · Torch-FL PR #634

  • Merge volume: 13 merges across the org with Kunlunxin or XPU in the title (FlagGems 10, Torch-FL 2, build-infra 1) — the most operator-side output among vendors, with lvxu2020 alone contributing 6, all targeting XPU kernels.
  • Operator optimizations: #7463 optimizes elu, special_i1e, foreach_erf, and foreach_zero; #7462 optimizes tile, dot, index_put; #7452 optimizes isfinite with a fused kernel; #7470 adds an XPU override for kl_div and further optimizes isfinite; #7351 adds an adaptive-tile fast path to less_equal tensor comparison; #7406 unrolls the column loop of the unmasked-row kernel in te_rmsnorm_fwd; #7390 optimizes isneginf, nan_to_num_, and log_sigmoid_backward; #7466 fixes baddbmm launch timeouts by enlarging the tile in the tuning config.
  • Fused MoE: #7107’s three-operator aggregate score rises from 1.324 to 1.329, while it proactively declares the baseline as a substitute implementation and dispatch_fused_moe_kernel at 0.626 as substandard (see 1.5).
  • Build and runtime: #1468 makes Kunlunxin FlagTree’s seventh backend (five unique constraints, see 1.7); Torch-FL #634 routes cross-card copies through xpu_memcpy_peer, and #632 fixes preload ordering.
  • Assessment: Kunlunxin’s activity on the day spans operators, build, and runtime — the only vendor with structural changes across all three lines simultaneously. The real risk also lies on the operator side: most changes are “another tile or fusion for the same operator,” lacking a unified performance gate, and aggregate-score methodology is not comparable across vendors due to baseline substitution.

3.3 Tsingmicro: Device Timeline Enters torch.profiler, Validated on TX8110 (10-22)

Date: 2026-10-22　Source: Torch-FL PR #630 · build-infra PR #1459

  • Capability gap closed: Tsingmicro (TX8) previously had no device-side profiling at all — PrivateUse1 had no profiler registration, so kernel events and device time were entirely empty. This PR implements DeviceTracer and a standalone profiling library using rocprofiler-sdk, correlates NPU kernels back to aten ops and presents them in CUDA layout, validated on TX8110; it also pins FLAGOS_BUILD_VENDOR=ON for Tsingmicro (the vendor directory includes random-number kernels), and updates the install guide and compatibility matrix from “runtime only” to include profiling.
  • Self-declared impact: Changes to flagos_kineto_profiler.cc affect runtime slice positions and device row naming across all backends, but were only re-validated on Tsingmicro hardware — a residual risk the PR itself states.
  • Other: No Tsingmicro-specific merges in FlagGems; build-infra’s unified flagcx 0.14.0 pin gives the Tsingmicro backend an explicit communication dependency as well.
  • Assessment: Over the past three days, Tsingmicro has been filling infrastructure gaps in “build, random numbers, profiling” rather than operator coverage. This ordering is the most instructive for newcomers: first build in CI, then reproduce randomness, then observe performance, and only then discuss optimization.

3.4 Moore Threads and Enflame: MUSA Cache Persistence, GEMM, and a Bulk Enflame Update (10-22)

Date: 2026-10-22　Source: FlagTree PR #1385 · FlagBLAS PR #152 · FlagGems PR #7077 · FlagTree PR #1424

  • Moore Threads: FlagTree #1385 adds per-copy TME cache persistence for MUSA, a compiler-side increment to the tensor memory engine; FlagBLAS #152 adds a GEMM implementation; the 5 title-related FlagGems merges focus on MUSA test skips and input-domain restrictions (#7502 to #7504), indicating that failures on this backend remain dominated by “unsupported input” rather than implementation errors.
  • Enflame: FlagGems #7077 lands the vendor’s 10-13 bulk update (26 files, +3520/−511) into main in one shot — the largest single vendor-side change of the day; FlagTree #1424 disables the 02-sparse-mla case in CI due to intermittent bus errors, and #1427 updates vllm benchmark parameters. Together, the two CI adjustments indicate that Enflame’s stability issues remain at the test-case layer rather than the product layer.
  • Assessment: The two vendors’ output differs in nature — Moore Threads is filling in reusable capabilities like caching and linear algebra, while Enflame is delivering a bulk update and handling CI noise. The former accumulates; the latter needs a verifiable breakdown, otherwise “bulk update” can only be recorded as a black box in future reports.

3.5 Ascend, Iluvatar, MetaX, and Others: Small Steps Split by Backend, Horizon and Cambricon Silent (10-22)

Date: 2026-10-22　Source: FlagGems-vllm PR #936 · FlagBLAS PR #153 · FlagGems-vllm PR #977 · FlagGems-vllm PR #777

  • Ascend: FlagGems-vllm #936 switches Ascend’s chunk gated delta rule forward to tle.dsa’s slicing and synchronization interfaces; the 7 FlagGems changes with Ascend or NPU in the title are mostly test skips and case synchronization; TransformerEngine-FL opened three new NPU-related PRs the same day (#144 get_num_cublas_streams, #145 cuDNN version capability query, #146 bshd/thd layout), not yet merged.
  • Iluvatar: FlagBLAS #153 optimizes L1-layer operators; FlagCX #670’s Iluvatar CoreX unit-test pipeline and image are still under review; sglang-plugin-FL #139’s 0.5.18 empty runtime adaptation is still under review (created 10-15).
  • MetaX: FlagGems-vllm #977 adds a TP=2 configuration (1.065x average, see 1.10); FlagGems #7454’s MetaX fix is under review; build-infra’s unified flagcx pin covers the MetaX backend.
  • DCU and PPU beyond Hygon: Torch-FL #629 adds a convolution_overrideable exception for the cuda/dcu/metax/ppu backends — a batch coverage of the same fix.
  • Horizon and Cambricon: No pushes or merges in either vendor’s dedicated repos across the org for the day — silent for a second consecutive day.
  • Assessment: Apart from Hygon and Kunlunxin, the other five vendors all advanced “one path or one operator” with no structural changes. The continued silence from Horizon and Cambricon is the only gap worth flagging this period — if there is still no activity next week, it should be listed as a risk item in the weekly report.

IV. Summary and Trend Observations

  • Capacity structure: FlagGems alone accounts for 56% of merges, the quantum stack for 40% of submissions, with build and runtime at roughly 10% each. Merge volume hit a new high for the past week while submissions declined, indicating that the day’s theme was clearing backlog rather than expansion — consistent with the state following two consecutive days of large merges on 10-20 and 10-21.
  • The first cell of the 2.3 cycle: FEP-0140 and FEP-0141 merged on 10-21, and on 10-22 Hygon landed both vLLM 0.28.0 and SGLang 0.5.18. This chain went from “writing the matrix into docs” to “first validated pass” in a single day — the fastest requirement-to-evidence loop this quarter. The remaining nine vendors and two version lines are the main workload for the next six weeks.
  • Build-layer convergence: Kunlunxin becomes FlagTree’s seventh backend, flagcx 0.14.0 is pinned across twenty backends, and optest becomes an installable package. Together, the effect is “no more editing install scripts when switching backends,” which matters more for 2.3 delivery speed than any single-point performance gain.
  • Observability becomes the new weak spot: Tsingmicro gets a device timeline for the first time, and Kunlunxin’s cross-card copies had been failing silently. Both suggest that after “it runs,” the first hurdle for multi-backend is observability and reproducibility, not speed; the test porting and case-contract rework of the past two weeks (61 commits by lukatao alone) is another expression of the same judgment.
  • Risk one: All 20 FlagQuantum merges were done by a single account, and the new native Rydberg path covers only CPU and one or two roles. Physical-semantics validation depends on the same group writing both tests and implementation, leaving no independent external review; proposal 083 (terminal sampling) is not yet approved, and fast-tracking it would simultaneously change the Runtime, measurement results, and random source.
  • Risk two: “Bulk updates” like Enflame #7077 lack a verifiable breakdown — 26 files and +3520 lines cannot be mapped to specific operators or specific gains; and Kunlunxin’s three fused-MoE performance figures were measured against a substitute baseline. Both will distort subsequent cross-vendor comparisons.
  • Watch items: Whether the next vendor for vLLM 0.28 (Tsingmicro or MetaX) reuses Hygon’s empty-backend template; whether the FlagTree 0.7.1 development build (0.7.1.dev1 from 10-20) goes GA before 2.3; whether TransformerEngine-FL’s three NPU PRs merge before the weekend; and whether the silence from Horizon and Cambricon extends into next week’s report.

Appendix: Source Verification Table and Full Source List

Source Verification Table

Source Verification Result
Org repository API Full verification of 61 repos, 16 repos had pushes within the window
Commit search 135 hits, distributed across 12 repos, FlagQuantum and FlagGems together accounted for 82
Merged PR search 163 merged within the window, across 13 repos
Open PR search 183 updated within the window, of which 90 newly opened
Release and build tags 31 repos checked one by one, no new versions within the window; most recent was the 10-20 FlagTree development build
org event stream 100 events, of which 43 PR events, 27 pushes, 12 branch deletions, 9 branch creations, 4 comments, 3 reviews, 2 watches
Branch-level fallback docs, release-info, sglang-plugin-FL, vllm-plugin-FL four repos had pushes to non-default branches, no new commits on the main branch
Google News RSS 24 groups of Chinese and English queries, 17 candidates, 2 valid
HN Algolia 8 groups of queries, 4 for FlagOS, 2 for FlagGems, none with direct title matches
CSDN FlagOS column 51 links on the homepage, latest original article dated 08-28; newly added 10-22 19:00 university roundtable livestream
BAAI Hub Search page is client-rendered, only the framework page was obtained
English media One Pandaily article paraphrasing 2.2, consistent with domestic reporting, added the 19.87% latency figure
Domestic media One Jushen Home article on the FlagOS-Robo project initiation, original source was Crossdim Intelligent

Full Source List