Research window: 2026-10-19 06:00 ~ 2026-10-20 06:00 (Beijing time, 24 hours; Tuesday morning report, window continues from the previous daily report’s cutoff, excluding content from during the conference).

Sources: GitHub (full audit of 61 repos under org: flagos-ai, 93 commit searches, 88 merged PRs and 180 open PRs searched, Release and tag audits of 16 active repos, 100 org event stream entries with branch-level fallback), Google News RSS (24 sets of Chinese and English query terms, via proxy), HN Algolia (8 sets), China.com and DoSTOR technical articles, CSDN and BAAI community channel audits (see appendix source list for details).

This Issue’s Index

  • Today’s Focus: The first full engineering day after the conference — 93 commits, 88 merges; build-infra unifies the four Ascend sub-repos, Tsingmicro and Sunrise onto a 22.04 self-contained builder (glibc floor lowered from 2.38 to 2.35); FlagQuantum merges 405 files with 159 new public names and establishes the M0 roadmap; FlagBLAS completes Hygon gfx936 six-precision GEMM; FlagDNN pushes directly to master to add the Iluvatar equivalent-performance baseline (10-19)
  • I. Open Source Project Progress (GitHub Activity)
    • 1.1 Organizational Rhythm: 16 repos pushed, 93 commits, 88 merges; lowering the glibc floor becomes the day’s main thread (10-19)
    • 1.2 build-infra: Four Ascend sub-repos migrated from the 24.04 runtime into the 22.04 self-contained builder, with Tsingmicro and Sunrise completed the same day (10-19)
    • 1.3 FlagQuantum: 405 files merged to expand the quantum stack, M0 through M4 roadmap established (10-19)
    • 1.4 FlagGems: KernelGen sparse family batch under review, Kunlunxin XPU3 attention family and Ascend mm dispatch advance in parallel (10-19 ~ 10-20)
    • 1.5 FlagBLAS: Hygon gfx936 six-precision GEMM merged, dgemm depends on FlagTree fp64 MMAC (10-19)
    • 1.6 FlagTree: Enflame GCU300 baseline and AMD RDNA fallback path, Ascend 3.5 py312 delivery (10-19)
    • 1.7 Inference and Training Stack: Sunrise and Enflame graph mode, HY4 H100 integration, Ascend vLLM 0.28 upgrade (10-19)
    • 1.8 FlagDNN / FlagTrain / FlagSparse / Torch-FL: Iluvatar equivalent performance, Moore Threads backend, MUSA optimization (10-19)
  • II. News Coverage and Ecosystem
    • 2.1 First In-Depth Technical Article After the Conference: China.com publishes a full-stack breakdown of FlagOS 2.2, adding seven quantified case studies (10-19)
    • 2.2 Coverage Spread and Channel Verification: DoIT’s full speech transcript is an old 10-18 draft indexed late; no new items on CSDN or BAAI Hub (10-19 ~ 10-20)
  • III. Member Company Deep Dive
    • 3.1 Hygon: FlagBLAS six-precision GEMM and L1 support land in the repo simultaneously (10-19)
    • 3.2 Iluvatar CoreX: FlagDNN equivalent-performance baseline pushed directly to master, Torch-FL splits out an independent runtime (10-19)
    • 3.3 Tsingmicro and Sunrise: Two backends enter the FlagCX 22.04 builder the same day (10-19)
    • 3.4 Enflame: GCU300 baseline, vLLM benchmark workflow, and builder assertion fixes (10-19)
    • 3.5 Moore Threads, Ascend, DAMO XuanTie: MUSA operator line, CANN 9.0 baseline, T-Head GRU deadlock fix (10-19)
  • IV. Summary and Trend Observations

Today’s Focus: First Engineering Day After the Conference — Delivery-Surface Unification Overshadows New Features (10-19)

Date: 2026-10-19　Sources: build-infra PR #1414 · FlagQuantum PR #635 · FlagBLAS PR #151 · FlagDNN commits (full list in appendix)

  • Cadence: Within the 24-hour window, 16 repos had pushes, with 93 commits, 88 merges, and 180 open PRs updated. Merge volume exceeded the daily average of the previous three-day window (about 46/day). Commit times clustered between 07:00 and 23:00, peaking between 14:00 and 17:00 — a typical weekday rhythm, with no surge during the conference.
  • The main thread is “delivery-surface unification,” not new capabilities: All 16 build-infra commits centered on the artifact pipeline — migrating the four Ascend wheels from the 24.04 runtime image to a standalone ubuntu:22.04 self-contained builder (PR #1414), and adding same-spec builders for Sunrise (PR #1418) and Tsingmicro (PR #1422) the same day. The reason: libflagcx.so / _C*.so built in the 24.04 image linked against GLIBC_2.38 and aborted outright on actual 22.04 bare-metal machines; switching to the 22.04 builder lowered the glibc floor to 2.35, aligning with the other vendors’ rows.
  • The quantum stack was the day’s largest single merge: FlagQuantum PR #635 merged at 405 files, +114463/−3983, adding 159 public names across algorithms (45→148), quantum error correction (84→108), remote invocation (20→32), observables (12→20), and compiler (12→17), and opening a new flagquantum.operators package; the capability registry grew from 68 to 97 entries, while Stable Core’s 41 exports remained unchanged. The same day, PR #637 established the M0–M4 roadmap, bringing five hardware classes — superconducting, neutral atom, ion trap, photonic, and topological — under the same Core IR and compiler constraints.
  • Hygon completes the BLAS backbone: FlagBLAS PR #151 merged six-precision GEMM for gfx936 (sgemm, hgemm, bfgemm, dgemm, cgemm, zgemm, +7060/−127), with dgemm using an fp64 MMAC dot-product kernel and depending on FlagTree’s fp64 MMAC support; combined with PR #149’s Hygon L1 support, the Hygon path now extends from the operator layer down to basic linear algebra.
  • The Iluvatar side is a performance baseline pushed straight to master: All 4 FlagDNN commits that day landed directly on master (no PR process) — an equivalent performance baseline for the iluvatar backend (equivalent_baseline.cpp et al., +8157) plus two subsequent rounds of fixes, while also cleaning up the ascend backend’s validation directory (−7047).

I. Open-Source Project Progress (GitHub Activity)

1.1 Organizational Rhythm: 16 Repos Pushed, 93 Commits, 88 Merges (10-19)

Date: 2026-10-19　Source: flagos-ai organization repositories · Commit search · Merged PR search

  • Repository side: Of 61 repos, 16 had pushes within the window. By commit count: FlagGems 23, FlagQuantum 23, build-infra 16, FlagBLAS 9, FlagTree 5, FlagDNN 4, FlagGems-vllm 3, vllm-plugin-FL 3, Torch-FL 2, FlagSparse 2, FlagCX 1, FlagTrain 1, FlagAttention 1.
  • Merge side: 88 merges, distributed as FlagGems 36, build-infra 16, FlagQuantum 9, FlagTree 8, vllm-plugin-FL 6, FlagBLAS 3, FlagGems-vllm 3, Torch-FL 2, and 1 each for FlagCX / FlagTrain / FlagAttention / FlagSparse / TransformerEngine-FL. FlagGems and build-infra together account for 42% of commits and 59% of merges.
  • Review side: 180 open PRs were updated within the window (the API returned the first 100 for per-repo statistics). Leaders: FlagGems 63, FlagGems-vllm 12, vllm-plugin-FL 5, Torch-FL 4, FlagCX 3, FlagTree 3, FlagGems-sglang 3. Of these, 28 have “KernelGen” in the title, 30 mention Kunlunxin, and 8 mention sparse—these three queues constitute the current backlog.
  • Branch-level fallback: docs pushes landed on the update/modelscope-docs-20261019-175239 branch (main still at 10-03); Trident’s push corresponds to PR #4 “Monad middleware” (master at 10-13); FlagCV has had no new activity since its skeleton merge in the early hours of 10-19; seven repos—FlagFFT, FlagScale, Megatron-LM-FL, FlagPrism, FlagAudio, FlagOps—had zero pushes in the window.
  • Assessment: After the two conference days (10-17 to 10-18), the organization did not stall post-launch; instead it immediately redirected capacity back to artifacts and baselines. No new releases (no Release in the window) and no new repos were created—a day of “no versions, heavy delivery.”

1.2 build-infra: Ascend’s Four Wheels Migrated to a 22.04 Self-Contained Builder; Tsingmicro and Sunrise Added Same Day (10-19)

Date: 2026-10-19　Source: PR #1414 · PR #1418 · PR #1422 · PR #1417 · base directory

  • Core problem: Ascend’s four wheels were originally built in a 24.04 runtime image, producing libflagcx.so and _C*.so linked against GLIBC_2.38, which abort outright on the bundle’s 22.04 physical machines. PR #1414 gives each configuration line its own ubuntu:22.04 builder, putting it on the same channel as other vendors and lowering the glibc floor to 2.35.
  • One recipe serving four lines: ascend.mk only links -ltorch_npu -lascendcl -lhccl, independent of the specific chip; but the toolchain itself does not carry these link-time dependencies—libhccl.so and <hccl/hccl.h> come from the chip ops package—so the recipe installs both the toolkit and the ops package (excluding nnal/ATB), with the 910b vs. 910c difference passed via the ops installer’s chip token (builder.ops_product, 910b and A3).
  • Verification criteria: The SDK floor is proven with import torch_npu (which dlopens CANN toolchain libraries) rather than import torch (pure CPU on that line); ASCEND_OPP_PATH, ASCEND_AICPU_PATH, TOOLCHAIN_HOME, and LD_LIBRARY_PATH flow from set_env.sh into /etc/profile.d/vendor.sh—the same file sourced during wheel builds.
  • Two new backends added same day: Sunrise (PR #1418, a 22.04 self-contained builder for the sunrise wheel, followed by PR #1420 recording that the wheel was re-released as 22.04-clean) and Tsingmicro (PR #1422, a 22.04 self-contained builder for the tsingmicro wheel). The vendor matrix under base/ is now nvidia (cuda12.8 / cuda13.3), ascend (cann8.5.0 / cann9.0.0, including 910c), cambricon (neuware4.4.3 / 4.7.2), enflame (tops1.9.10 / 1.10.6), hygon (dtk26.04), iluvatar (corex4.4.0 / 4.5.0), metax (maca3.7.2.1 / 3.8.1.3), sunrise (tangrt1.2.0), tsingmicro (tsm260610)—9 vendors in total.
  • Three FlagTree-side changes: PR #1417 adds the Enflame builder and makes verification steps data-driven; PR #1419 fixes the “assert Enflame backend at build time” pattern; PR #1421 pre-stages the Enflame toolkit deb into the builder image, reducing per-build download dependencies. Additionally, PR #1410 reads the pybind11 ABI back from the actually emitted plugin rather than hardcoding a literal, and PR #1413 makes a failed plan fail the entire run instead of skipping the build.
  • Assessment: None of these 16 changes is feature development—all close the gap between “builds on this machine” and “runs on the target machine.” Combined with the six-backend 22.04 consolidation from 10-16 to 10-18, FlagCX’s artifact channel has transitioned from “patching backend by backend” to “one backend per line, one shared 22.04 recipe.”

1.3 FlagQuantum: 405-File Merge Expands Quantum Stack; M0 Roadmap Established (10-19)

Date: 2026-10-19　Source: PR #635 · PR #637 · PR #642 · Repository

  • Scale: 23 commits and 9 merges, tying for the highest commit count of the day. PR #635 alone touches 405 files, +114463/−3983, adding 159 public names: algorithms from 45 to 148, quantum error correction from 84 to 108, remote invocation from 20 to 32, observables from 12 to 20, compiler from 12 to 17, simulation from 8 to 11, plus a new flagquantum.operators package (4 exports). The capability registry grows from 68 to 97 entries, with development_evidence from 20 to 47.
  • Boundary discipline: All new names are subpackage entry points; Stable Core’s flagquantum.__all__ remains 41 exports, byte-identical to main. The PR description explicitly states that “promotion to Stable Core follows a separate proposal path,” and adds three contract documents (compiler pass admission, multi-level IR internal interfaces, real-time messaging).
  • Roadmap: PR #637 establishes phased scope, dependencies, and acceptance criteria for M0 through M4, requiring reuse of the existing Core IR, compiler, dynamics solvers, runtime, and PyTorch integration, covering five hardware types—superconducting, neutral atoms, ion traps, photonic, and topological; M1 starts from mixed-dimensional state spaces. The same PR also fixes precision in contracted Gaussian overlap integrals (switching to math.fsum for cancellation-sensitive sums, plus a primitive-basis regression test).
  • Dynamics and compiler: PR #639 supports mixed-dimensional state spaces, PR #640 supports explicitly truncated bosonic operators, PR #641 supports coefficient training for static operator sums, and PR #642 lets callers inject their own passes by name at two optimization points. Over 10 additional test and documentation commits change numerical assertions to “precision-based repeatability comparisons” rather than fixed literals.
  • Assessment: The quantum stack is moving from “framework prototype” to “general-purpose quantum computing framework”—PR #635 adds coverage (error correction, chemistry, real-time invocation, superoperators), while PR #637 adds boundaries and phases. Merged the same day, they signal that M0’s starting point is to document existing capabilities clearly, not to expand the API first.

1.4 FlagGems: KernelGen Sparse Family Batch Under Review; Kunlunxin XPU3 Attention Family and Ascend mm Dispatch Advance in Parallel (10-19 ~ 10-20)

Date: 2026-10-19 ~ 2026-10-20　Source: PR #7260 · PR #7239 · PR #7203 · Open PR list

  • Merge side: 23 commits, 36 merges. The KernelGen line continues filling in the ATen checklist and moves into sparse and view semantics: _adaptive_avg_pool3d (#7172), fft_ifftshift (#7171), ccol_indices_copy (#6775), _coalesce (#7096), _neg_view_copy (#7088) merged; meanwhile PR #7260 migrates 185 Q4 operator test suites in one go.
  • Review side: About 20 new KernelGen commits between 10-19 23:00 and 10-20 05:00, concentrated in the sparse family:
    _sparse_mm (#7289), _sparse_mm_reduce_impl (#7298), _sparse_mm_reduce_impl_backward (#7303), _sparse_addmm (#7277), copy_sparse_to_sparse_ (#7231), resize_as_sparse_ (#7255), _convert_indices_from_coo_to_csr (#7297), _convert_indices_from_csr_to_coo (#7296), _indices (#7293), ccol_indices (#7295), etc. The sparse family opening up all at once suggests the mainline dense operators are nearing completion.
  • Kunlunxin: Merged: XPU3 conv1d/conv2d/conv_depthwise2d (#7109), chunk_gated_delta_rule_fwd (#7104), dropout and mhc_post performance (#7113), take_along_dim and te_rmsnorm_bwd (#7089), softmax_out’s tle.gpu fused path (#6897), baddbmm/copy_ failures and tile_size 32768 hang fix (#7245); under review: 30 PRs, including the attention family (#7275: forward tiling, varlen KV fusion, backward reference), lstm (#7105), rnn_relu (#7110), cholesky_solve (#7103), linalg_lu_factor (#7273).
  • Ascend and Hygon: Ascend mm shape dispatch and Triton tiling optimization (#7239), reference contract and precision-skip fixes (#7286, #7287, #7253), int_repr reference adaptation (#7253); Hygon hygon_mv timeout fix (#6584). All three lines follow the order of “get tests standing first, then talk performance.”
  • Other backends: DAMO XuanTie backend GRU barrier deadlock fix (#7203) and sparse QSA’s 16-row minimal tile (#940, FlagGems-vllm); Moore Threads KMCompiler line feeds linear weights into WS SQMMA via trans_b (#7261) and enables musa for rnn_tanh (#7256); PPU container resource limits restored across three repos (#7254, #942, #101).
  • Benchmark side: --base-data supports external NVIDIA baseline comparison (#7219), fixes timing errors for metadata-only operators (#7283) and reporting issues with nested tensors and descriptors (#7276), and cleans up outdated reference decorators (#7271). About a quarter of the day’s 36 merges are measurement and reporting fixes—directly relevant to the reproducibility needed for external claims like “cross-chip performance +27.6%.”

1.5 FlagBLAS: Hygon gfx936 Six-Precision GEMM Merged (10-19)

Date: 2026-10-19　Source: PR #151 · PR #149 · Repository

  • Main body: PR #151 merges vendor-specific GEMM kernels for Hygon gfx936, covering six precisions—sgemm, hgemm, bfgemm, dgemm, cgemm, zgemm (+7060/−127, 23 files). hgemm/cgemm/zgemm use dedicated Triton kernels with shape-tiered configurations, plus a ctypes-based hipBLAS reference implementation and cupy-free tests; dgemm uses an fp64 MMAC dot-product kernel; bfgemm includes a tuning pool, TN three-way strategy, and padding path.
  • Dependencies: dgemm explicitly depends on FlagTree’s fp64 MMAC support—BLAS precision completion exposed a capability gap on the compiler side, a concrete case of cross-repo coordination.
  • Supporting changes: Same-day PR #149 merges Hygon L1 support and completes L1 benchmark shapes, plus a standalone sgemm change (#91) and cleanup commits (English comments, ABS operator removal); the repo saw 9 commits and 3 merges in the window, fourth-highest commit count of the day.
  • Assessment: FlagBLAS previously had only one release, v0.3.0 (09-28), with sparse daily commits; nine commits in a single day with all six precisions is the Hygon channel’s first systematic investment since FlagOS 2.2.

1.6 FlagTree: Enflame GCU300 Baseline and AMD RDNA Lowering Path, Ascend 3.5 py312 Delivery (10-19)

Date: 2026-10-19　Source: PR #1363 · PR #1397 · PR #1396 · Repository

  • CI and baselines: Enflame enflame3.6-gcu300 FlagGems baseline and test workflow (#1397), Enflame vLLM benchmarks into the workflow (#1334), AMD amd3.6 FlagGems baseline and test workflow (#1399); Ascend 3.5 py312 delivery workflow (#1396) and subsequent fix (#1398); codeowner update for the triton_v3.5.x branch (#1406).
  • Compilation capabilities: On the FlagMega side, TLE’s pipe, warp_specialize, and distributed_barrier are lowered to AMD RDNA (#1363), and an nvidia-sm89 (Ada) target is added for the portable decode path (#1362). The former sinks the dialect down to consumer-grade AMD GPUs; the latter moves the decode path previously tied to Hopper forward to Ada.
  • Assessment: FlagTree’s work for the day is almost entirely about filling cells in the “backend × version × workflow” three-dimensional matrix—5 commits and 8 merges, none touching core IR. This is two sides of the same coin as the builder consolidation in 1.2: artifacts and CI first, language layer once the matrix stabilizes.

1.7 Inference and Training Stack: Sunrise and Enflame Graph Mode, HY4 H100 Onboarding, Ascend vLLM 0.28 Upgrade (10-19)

Date: 2026-10-19　Source: PR #569 · PR #578 · PR #453 · Repository

  • Two graph-mode changes: Sunrise graph mode (#569) and Enflame GCU300 graph mode (#578, inductor + cudagraph) merged the same day, meaning vLLM’s CUDA Graph path is beginning to land on two domestic backends rather than being validated only on Ascend/Kunlunxin.
  • Chip onboarding: HY4 H100 FlagOS support (#453) merged; branch management forward-syncs 0.4.0-dev to 0.5.0-dev (#612), with CI auto-creating such sync PRs (#609).
  • Version lines: DAMO XuanTie backend upgraded to vLLM 0.28.0 (#574); under review: “port opt-in FlagGems-vllm operators to vLLM 0.28” (#613), Ascend full decode graph with Qwen3.6 (#606), graph-mode investigation for Hy4-preview on MetaX C550 (#614).
  • Training side: TransformerEngine-FL merges CICD platform matrix filtering, ci-complete gate, bounded retries, and the /ci command (#137); Torch-FL merges CI line-coverage reporting and a MetaX reporting fix (#587), and has “unify FlagCICD entry point, supporting L0 to L2” under review (#599).
  • Assessment: The keywords for the inference stack today are “graph mode rollout + version line catch-up.” Graph mode is a prerequisite for realizing performance, and vLLM 0.28 is repayment of version debt—both prepare for the next round of external performance numbers.

1.8 FlagDNN / FlagTrain / FlagSparse / Torch-FL: Iluvatar Equivalent Performance, Moore Threads Backend, MUSA Optimization (10-19)

Date: 2026-10-19　Source: FlagDNN commits · FlagTrain PR #20 · FlagSparse PR #113 · Torch-FL PR #593

  • FlagDNN: All 4 commits pushed directly to master—first adding iluvatar equivalent-performance baselines (equivalent_baseline.cpp, equivalent_runner.hpp, etc., +8157), followed by two rounds of fixes (including hygon baseline contract and pre-commit adjustments), and cleanup of the ascend verification directory (−7047). No PR process that day; direct maintainer pushes.
  • FlagTrain: Merges Moore Threads backend and support for two operators (#20). The repo only got its first documentation on 10-15 and has been continuously adding packbits, unpackbits, and evoformer_attn since 10-14—currently the youngest operator repo.
  • FlagSparse: Merges MUSA optimization (#113, from the NCIC-AlphaSparse branch); 2 commits and 1 merge in the window. Vendor investment in the sparse library is currently concentrated on the Moore Threads line.
  • Torch-FL: Merges “give iluvatar an independent runtime so wheels link against CPU torch” (#593) and CI coverage reporting (#587); under review: Iluvatar BI-V150 build test row (#569), unified FlagCICD entry point (#599), cancel superseded PR and branch runs (#588).
  • Assessment: What the four repos share is “adding a measurable baseline for a given vendor’s backend”—Iluvatar needs equivalent performance, Moore Threads needs a backend entry point, the sparse library needs a MUSA path, and Torch-FL needs to install on machines without GPU drivers. This work never appears in external messaging, but it determines whether the next performance table can cover these chips.

II. News Coverage and Ecosystem

2.1 First In-Depth Technical Article After the Conference: China.com Publishes Full-Stack Breakdown of FlagOS 2.2 (10-19)

Date: 2026-10-19　Source: China.com Technical Article · NetEase Reprint

  • Nature: This is the first media article with complete technical details after the conference (10-17 to 10-18), published at 17:56 on 10-19. It is not a transcript of the talk; it is organized into five sections—”Operators and Compilation, Assisted R&D, Plugins and Quantization, Token Services, On-Device and Platform”—and includes 8 architecture diagrams and 3 performance tables.
  • Newly added quantitative facts (not covered in the previous daily brief): KernelGen now supports nine AI chips; this quarter it generated 765 new operators, of which 416 passed accuracy validation on at least 5 domestic chips and reached over 80% of native operator performance; all 40 FlagGems-SGLang operators passed on NVIDIA; 8 new fused operators were added for Qwen3.8-Flash-Next and full CUDA Graph capture was completed.
  • Real-world cases for quantization tools: FlagOS-Compressor on Qwen3.5-397B-A17B with W8A8 reduced the model file from 751.41GB to 382.45GB (a 49.1% reduction), achieved 84.85% absolute accuracy on GPQA-Diamond, and completed validation on two inference chains: NVIDIA H20 and a domestic PPU; for Qwen3.8-2.4T-A95B, it provides processing paths from BF16 and FP8 to INT8.
  • Scenario-specific figures for Token services: DeepSeek V4.1 Flash on H100 (1P1D, W4A16/FP8) improved per-request decode speed by 19.7% and 18.0% at 32-way and 64-way concurrency, respectively; DAMO XuanTie 810E (16× 96GB per node, W8A8) improved by 83.1% and 91.5% at 24-way and 48-way concurrency, respectively. GLM-5.3-Flash logical service throughput rose from 8.52k to 17.36k tokens/s (2.04×); generation speed at 512K long context was 60.9 tokens/s, 99.7% of the externally measured official API reference value of 61.1; based on a monthly rental of 16,500 yuan for 8× 910B, the rental-equivalent cost per million output tokens was 59.27 yuan at 256K input/8-way concurrency, 19.4% lower than the commercial API billing reference, and 104.53 yuan at 512K input/4-way concurrency, 27.6% lower.
  • Ecosystem and platform side: Ecosystem membership stands at 107 organizations; community downloads in Q3 were 464,336, 4.76× Q2; new partners include Lingchuan Technology, China Electronics, Runkaohong, China Telecom, NXP, Biren Technology, Kuaiwei Intelligence, and ListenAI; on the training side, China Telecom’s Xingchen large model integrated FlagGems into the MindSpore + CANN + Ascend NPU stack, with training operators such as mHC and TopK end-to-end validated, and the MindFormers integration open-sourced and merged; on the inference side, Xing4.0-29B-A4B completed adaptation across ten chip platforms (including Apple M5 Pro and Cixin P1 via W4A8 on-device quantization), with 12 inference operators open-sourced to the FlagGems and vLLM main repositories; iSoftStone’s Tianyuan Intelligent Computing hybrid cloud optimized GLM-5.2 on four Ascend 910C machines, and with all five changes enabled, p50 ITL dropped 14.53% and server-side p99 ITL fell from 83.82ms to 66.35ms (−20.84%).
  • Assessment: The significance of this article lies not in the number of figures but in the fact that it breaks down the 2.2 gains into “individually verifiable cases”—each figure carries a model name, chip model, concurrency level, and comparison baseline. The 2.2 coverage in the previous two daily briefs centered on the four aggregate metrics from the main forum; this article fills in the grouped evidence.

2.2 Coverage Spread and Channel Verification: Dostor Speech Transcript Is an Old 10-18 Piece Indexed Late; No New Items on CSDN or BAAI Hub (10-19 ~ 10-20)

Date: 2026-10-19 ~ 2026-10-20　Source: Dostor Article · CSDN DAMO Developer Matrix · BAAI Hub

  • Late-index identification: Google News indexed Dostor’s “Lin Yonghua: Zhongzhi FlagOS 2.2 Released, the Token Economy Is Moving Toward Physical AI” at 17:09 on 10-19, but the original page is dated 2026-10-18 and the content is a full transcript of the main-forum talk, from the same source as the DOIT on-site report cited in the previous daily brief. Per indexing rules, it is not counted as a new item and is logged only as spread.
  • Direct component-name searches still return zero: The seven component names—FlagOS, FlagGems, FlagScale, FlagTree, FlagPerf, FlagCX, and KernelGen—again had zero hits within the 24-hour window, the same conclusion as several consecutive windows; hits were concentrated on broad terms such as “BAAI open source / chip” and “domestic compute open-source software stack,” and 12 of the 14 candidates were capital-market and market-recap pieces (IPO issuance statistics, industrial expo awards, funding briefs, office Agent reports) and were excluded based on title semantics.
  • Channel verification: No new articles appeared in the CSDN FlagOS column or the DAMO Developer Matrix during the window (the latest is the 10-12 full-agenda preview; the 10-17 to 10-18 sub-forum livestream pages are still marked “replay in progress”); the BAAI Hub homepage and site search have no FlagOS-related entries; eight HN Algolia queries returned no direct hits, with all results being false matches on homonyms. Session-by-session notes from the conference sub-forums had still not been published as of the window cutoff.
  • Assessment: The news side has entered a “post-conference digestion period”—main-forum content is being reprocessed by media, while sub-forum and workshop content has yet to be written up. For the daily brief, the effective news items this issue number 1 (2.1), and the bulk of the information volume remains on the GitHub side.

III. Deep Dive on Member Units

3.1 Hygon: FlagBLAS six-precision GEMM and L1 support land in the repo together (10-19)

Date: 2026-10-19　Source: FlagBLAS PR #151 · PR #149 · FlagGems PR #6584

  • Action: PR #151 merges six-precision kernels for gfx936 — sgemm/hgemm/bfgemm/dgemm/cgemm/zgemm — and PR #149 merges L1 support; both landed in master on the same day. On the FlagGems side, the hygon_mv timeout issue was fixed (#6584).
  • Technical approach: BF16 uses a tuning pool + TN three-way strategy + padding path, with a performance report attached; FP64 uses an MMAC dot-product kernel; half precision and complex use independent Triton kernels + shape-bucketed configurations; the reference implementation switches to calling hipBLAS via ctypes instead of cupy — indicating the test environment deliberately avoids depending on the CUDA ecosystem.
  • Gap: dgemm depends on FlagTree’s fp64 MMAC support; whether the compiler-side capability has landed in mainline requires watching subsequent FlagTree MMAC commits. Currently we can only confirm that the dependency is documented in the PR.
  • Assessment: Hygon’s prior FlagOS investment centered on build channels and device interfaces (/dev/itrctl); entering the BLAS mainline means it is now stepping up at the layer where “performance can be measured directly by benchmarks.”

3.2 Iluvatar: FlagDNN equivalence-performance baseline pushed straight to master, Torch-FL splits out a standalone runtime (10-19)

Date: 2026-10-19　Source: FlagDNN commits · Torch-FL PR #593 · build-infra PR #1409

  • FlagDNN: Four commits pushed straight to master all revolve around iluvatar — a new equivalence-performance baseline (+8157), two rounds of fixes, and implementation adjustments to
    backends/iluvatar/dispatch/pointwise.py, kernels/activation_backward.py, and kernels/binary.py. The same batch also includes fixes to the hygon benchmark contract and cleanup of the ascend validation directory (−7047).
  • Torch-FL: PR #593 gives iluvatar a standalone runtime, making the wheel link against CPU-only torch — i.e., it can be installed on Iluvatar machines without a CUDA runtime; a companion PR for Iluvatar BI-V150 build and test rows is under review (#569).
  • Build side: build-infra PR #1409 refreshes iluvatar’s pin date to the 22.04 re-release, and PR #1420 records in the same batch that the sunrise wheel was re-released as 22.04-clean.
  • Assessment: Iluvatar’s three actions on this day point to the same goal — turning “can run on Iluvatar cards” into “can be automatically built, automatically tested, and automatically produce equivalence performance in Iluvatar’s standard environment.” The equivalence-performance baseline is the last piece of that goal.

3.3 Tsingmicro and Sunrise: Two backends enter the FlagCX 22.04 builder on the same day (10-19)

Date: 2026-10-19　Source: build-infra PR #1422 · PR #1418 · PR #1420

  • Tsingmicro: PR #1422 adds a 22.04 self-contained builder for the tsm260610 wheel; on the FlagGems side, a bump-flagtree-tsm branch appeared the same day (created 10-19 15:31), pointing to a FlagTree Tsingmicro version upgrade. The base image tsingmicro-tsm260610 is already in the matrix.
  • Sunrise: PR #1418 adds a 22.04 self-contained builder for the tangrt1.2.0 wheel and creates the flagcx-builder-sunrise branch (10-19 17:57); PR #1420 subsequently records that the wheel was re-released as 22.04-clean.
  • Significance: Neither company is in the front-row narrative of the 21 chip vendors counted under FlagOS 2.2, but their artifact channels have been onboarded to the same specification — which usually means the adaptation work has moved past “can it run” into “can it be delivered reliably.”
  • Unconfirmed: No standalone Release or external news from either company was seen within the window; this item rests solely on GitHub-side evidence.

3.4 Enflame: GCU300 baseline, vLLM benchmark workflow, and builder assertion fix (10-19)

Date: 2026-10-19　Source: FlagTree PR #1397 · PR #1334 · build-infra PR #1417 · vllm-plugin-FL PR #578

  • Three CI items: FlagTree adds a FlagGems baseline and test workflow for enflame3.6-gcu300 (#1397) and adds the Enflame vLLM benchmark to the workflow (#1334); build-infra adds the Enflame builder and makes the validation step data-driven (#1417), while also fixing the “build-time assertion on the Enflame backend” (#1419) and pre-installing the toolkit deb into the image (#1421).
  • One runtime item: vllm-plugin-FL’s GCU300 graph mode (#578) is merged, enabling inductor + cudagraph.
  • Assessment: Enflame’s six actions on this day cover five stages — “baseline, benchmark, packaging, assertion, graph mode” — the most complete chain among any single member unit. The landing of GCU300 graph mode also explains why build-infra had to fix the build-time assertion the same day — the graph-mode compilation path is more sensitive to backend declarations.

3.5 Moore Threads, Ascend, DAMO XuanTie: MUSA operator line, CANN 9.0 baseline, T-Head GRU deadlock fix (10-19)

Date: 2026-10-19　Source: FlagGems PR #7261 · PR #7203 · FlagTrain PR #20 · FlagSparse PR #113 · build-infra base

  • Moore Threads: FlagGems’ KMCompiler line feeds linear weights into WS SQMMA as trans_b (#7261), and the rnn_tanh test enables musa (#7256); FlagTrain adds the mthreads backend and two operators (#20); FlagSparse merges MUSA optimizations (#113). These three lines constitute all of MUSA’s actions for the day.
  • Ascend: Under build-infra’s base/, both ascend-cann8.5.0 and ascend-cann9.0.0 exist (each with a 910c variant), and the builders for all four wheels are unified on 22.04 (#1414); on the FlagGems side, mm shape dispatch and Triton tiling optimization (#7239), reference contract fixes (#7286, #7287, #7253); FlagTree’s 3.5 py312 delivery workflow (#1396, #1398); vllm-plugin-FL’s Ascend full-decode graph is still under review (#606).
  • DAMO XuanTie: FlagGems fixes the GRU barrier deadlock on the T-Head backend (#7203), FlagGems-vllm raises the minimum tile for sparse QSA to 16 rows (#940), and vllm-plugin-FL upgrades the XuanTie backend to vLLM 0.28.0 (#574). The three lines correspond to correctness, performance floor, and version tracking respectively.
  • Assessment: What the three companies share on this day is “fixing boundaries” rather than “adding new capabilities” — MUSA is filling in backend entry points, Ascend is filling in delivery and test contracts, and XuanTie is filling in concurrency correctness. Fixes of this kind do not show up in external performance figures, but they determine whether multi-chip baselines can be compared across the board.

IV. Summary and Trend Observations

  • Trend 1: Unification of the artifact channel precedes feature expansion. build-infra had 16 commits and 16 merges in a single day, all centered on the 22.04 self-contained builder; the four Ascend wheels, Sunrise, and Tsingmicro were pulled into the same recipe on the same day, and the base/ directory formed a matrix of 17 baseline images across 9 vendors. The lowering of the glibc floor from 2.38 to 2.35 more directly determines “whether the wheels can be installed on users’ machines” than any new operator. This thread connects with the six-backend consolidation from 10-16 to 10-18 into a complete chain, and can be seen as the first systematic catch-up after the FlagOS 2.2 release.
  • Trend 2: The quantum stack is moving from framework prototype to boundary definition for a general-purpose framework. FlagQuantum merged 405 files and 159 new public names in a single day, while using the M0-to-M4 roadmap to clarify the reuse prerequisites for five categories of hardware, and keeping the Stable Core’s 41 exports unchanged. This approach of “expanding subpackages while locking the core” is consistent with the positioning of FlagQuantum as the technical foundation document at the 10-18 Liangzhiyun release—before talking about capabilities externally, first write clearly which parts are stable interfaces.
  • Trend 3: Investment on the domestic compute side is shifting from “operators” to “benchmarks and foundational libraries”. Hygon completed six-precision GEMM and L1 support in FlagBLAS; Iluvatar added equivalent performance baselines in FlagDNN and pushed directly to master; Enflame laid out the GCU300 baseline and vLLM benchmark workflow in FlagTree; Moore Threads worked on three lines simultaneously: FlagGems, FlagTrain, and FlagSparse. The common thread is that all of them can be measured directly by benchmarks, rather than merely “supporting a certain operator.”
  • Trend 4: KernelGen has entered the final stretch of sparse and view semantics. On the merged side, _coalesce, ccol_indices_copy, and _neg_view_copy, together with more than ten sparse operators under review (_sparse_mm family, coo/csr index conversion, copy_sparse_to_sparse_), indicate that the dense mainline has largely been cleared out; meanwhile, Kunlunxin forms the largest single-backend queue with 30 under review, and the XPU3 attention family and RNN family are the main body to be merged next.
  • Trend 5: The news side has entered a post-conference digestion period, and the information focus is back on the repositories. There was 1 valid news item within the 24-hour window (China.com’s 10-19 technical breakdown, adding seven quantitative cases); direct searches by component name returned zero hits for a second consecutive period, and sub-forum minutes and workshop content have not yet been written up. Experience suggests that one to two days after such a window, secondary reporting from sub-forums usually appears, which can serve as an observation point for the next issue.
  • Watch for next issue: First, when the FlagQuantum feat/m0-common-foundation branch (created 10-19 16:47) will land a PR; second, the merge pace of the FlagGems batch of sparse kernels in the review queue; third, whether build-infra will replicate the “one backend per line” recipe to the artifact lines of FlagTree and Torch-FL; fourth, whether the conference sub-forum minutes will be made public.

Complete Source List

Source Verification Table

Source Verification Result
GitHub org flagos-ai Full check of 61 repos, 16 repos pushed within the window, 93 commits, 88 merges
GitHub Release / tags Checked each of the 16 active repos, no new Release within the window
GitHub open PRs 180 updated within the window, statistics by repo for the first 100 (FlagGems 63, FlagGems-vllm 12 lead)
Google News RSS 24 Chinese and English query sets, 14 candidates within the window, 1 valid (China.com 10-19 technical piece); component-name searches returned zero hits, 1 more was a late index of the Dostor speech transcript (page dated 10-18), the remaining 12 were capital-market, quote, and homonym mismatches
HN Algolia 8 query sets with no direct hits, returns were false matches on homonyms
China.com / NetEase 1 valid item (10-19 17:56 technical breakdown), adding seven quantitative cases
Storage Online 1 late-indexed item (page date 10-18, full speech text), not counted twice
CSDN FlagOS column / DAMO No new articles within the window, sub-forum livestream pages still marked as replaying
BAAI Hub No FlagOS-related entries on the homepage or in site search
Conference official agenda page No agenda changes, no minutes or speech transcripts made public