Research window: 2026-10-09 06:00 ~ 2026-10-10 09:40 (Beijing time, approx. 28 hours; this is a make-up report for the National Day adjusted workday, with the window starting from the cutoff of the previous daily report).

Sources: GitHub (org: flagos-ai, full verification of pushed_at across 54 repos, line-by-line verification of 52 commit search results, retrieval and verification of merged and open PRs, cross-checking of default branches against atomic sources, atomic verification of Releases/tags across 24 repos), Google News RSS (24 sets of Chinese and English query terms, via proxy), HN Algolia, official CSDN column and BAAI Community verification (see appendix source checklist for details).

Index for This Issue

  • Today’s Highlights: Dual-track intensity from vendors and contributors — Qingwei TX8110 enters CI, SiliconFlow batch output, FlagQuantum wrap-up (10-09 ~ 10-10)
  • I. Open Source Project Progress (GitHub Activity)
    • 1.1 Organization cadence: 11 repos pushed, 52 commits, 45 merges all newly added in this period (10-09 ~ 10-10)
    • 1.2 FlagGems: 18 merges — SiliconFlow batch, KernelGen operators and CI infrastructure (10-09)
    • 1.3 FlagGems open PR side: high-density updates across Kunlunxin / Ascend / SiliconFlow (10-09 ~ 10-10)
    • 1.4 FlagGems-Experimental: 5 KernelGen Nvidia merges (10-09)
    • 1.5 FlagTree: 6 merges — TLE test matrix, RLC enhancements and PPU 3.6 baseline (10-09)
    • 1.6 FlagQuantum: QBoson merge, Phase 2 wrap-up and installation UX fixes (10-09)
    • 1.7 FlagCX / build-infra: P2P Engine merge and 0.14.0-rc2 packaging backport (10-09)
    • 1.8 Other lines: FlagGems-sglang / FlagSparse / FlagTrain / vllm-plugin-FL / docs, etc. (10-09 ~ 10-10)
  • II. News Coverage and Ecosystem
    • 2.1 Ecosystem coverage: Domestic GPU “Four Little Dragons” enter the system competition phase (10-09)
    • 2.2 Search and official channel verification: component lines remain quiet, no new CSDN articles (10-09 ~ 10-10)
  • III. Deep Dive on Member Organizations
    • 3.1 Qingwei: TX8110 backend enters FlagGems operator test CI (10-09)
    • 3.2 Kunlunxin: fix batch merge and tle.raw performance line (10-09)
    • 3.3 Moore Threads: SDPA kernel optimization and RLC porting progress (10-09 ~ 10-10)
    • 3.4 Hygon / Iluvatar CoreX: conv operator line and BI-V150 adaptation (10-09 ~ 10-10)
    • 3.5 DAMO XuanTie / Ascend: PPU 3.6 CI and Ascend fix batch (10-09 ~ 10-10)
    • 3.6 Other members: MetaX / Enflame / Cambricon / Horizon Robotics / Biren (10-09 ~ 10-10)
  • IV. Summary and Trend Observations
  • Appendix: Source Verification Table
  • Complete Source List

Today’s Highlights: Dense Activity on Both Vendor and Contributor Fronts — Tsingmicro TX8110 Enters CI, SiliconFlow Batch Output, FlagQuantum Wraps Up (10-09 ~ 10-10)

Date: 2026-10-09 ~ 2026-10-10　Sources: FlagGems #6347 · FlagGems #6582 · FlagQuantum #604 · FlagCX #645 etc. (full list in appendix)

The adjusted workday window (~28 hours) continued the post-holiday high tempo: 11 of 54 repos had pushes within the window, commit search returned 52 hits, 45 PRs merged (all after the previous cutoff), and 147 open PRs updated within the window; no new releases or tags. Three main threads emerged:

  • Vendor front firing on all cylinders: Tsingmicro TX8110 backend officially entered the FlagGems full operator test CI (including self-hosted runners and official container images); Kunlunxin fixes and tle.raw performance batch, Ascend KMCompiler fix batch, SpacemiT build fixes, and Iluvatar conv operator line each saw activity (see 1.2 / 1.5 / 3.x).
  • Contributor batch output: SiliconFlow produced 9 items in a single window (4 merged + 5 newly opened), covering mode / cumprod_ / scaled_mm / fused_dropout / _fused_adamw / stft / triangular_solve and other operators, targeting mainly Ascend and Moore Threads (see 1.2 / 1.3).
  • Version and governance lines active: FlagCX 0.14.0-rc2 packaging changes backported to main, build-infra fix for flagcx wheel tag parsing (early signal of version line); FlagQuantum completed Phase 2 repo cleanup with 5 merges; Torch-FL added a CUDA compatibility design doc (see 1.6 / 1.7 / 1.8).

Assessment: This window is characterized by “broad coverage, moderate intensity” — 45 merges below the previous period’s 63, but spanning 10 repos (including CI, build, release infrastructure, and documentation), with vendor-side actions expanding from “fixes” to “continuous regression” (TX8110 CI) and “platform onboarding” (Biren SUPA); the next phase’s focus will be the version line (FlagCX 0.14.x, first new release since 09-28) and the pace of clearing competition backlog PRs.

I. Open-Source Project Progress (GitHub Activity)

1.1 Organization Cadence: 11 Repos Pushed, 52 Commits, 45 Merges — All New This Period (10-09 ~ 10-10)

Date: 2026-10-09 ~ 2026-10-10　Source: org: flagos-ai repository list · org repos API (baseline verification)

  • Repo surface: 54 repos (no new repos); 11 repos had pushes within the window — FlagGems (10-09 20:23), FlagQuantum (10-09 20:22), FlagCX (10-09 22:34), FlagTree (10-09 18:09), build-infra (10-09 17:29), FlagGems-vllm (10-09 16:35), FlagSparse (10-09 15:02), FlagGems-sglang (10-09 13:24), FlagGems-Experimental (10-09 11:22), FlagTrain (10-09 11:03), docs (10-10 06:48).
  • Commits and merges: 52 commits found in search (FlagGems 17 / FlagQuantum 8 / FlagSparse 5 / FlagGems-Experimental 5 / FlagTree 5 / FlagGems-sglang 4 / FlagCX 3 / build-infra 2 / FlagGems-vllm 2 / FlagTrain 1); all 45 merges postdate the previous period’s cutoff (10 repos; details in 1.2 ~ 1.8).
  • Under review: 147 PRs updated within the window (100 sampled and verified individually: primarily FlagGems 58 / vllm-plugin-FL 10 / FlagTree 10 / FlagGems-Experimental 8).
  • Releases: Atomic verification of 24 repos’ Releases and 6 repos’ tags — no new Releases or tags within the window (latest remains the 09-28 ~ 10-01 batch).
  • Note: FlagAttention / FlagFFT / vllm-plugin-FL main-branch pushes occurred before the window (10-08); this window was dominated by PR review activity.

1.2 FlagGems: 18 Merges — SiliconFlow Batch, KernelGen Operators, and CI Infrastructure (10-09)

Date: 2026-10-09　Source: #6582 · #6347 · #6924 and 18 others (see appendix)

  • SiliconFlow batch of 4 (merged in a burst from 10:05 ~ 10:13): #6582 mode operator optimization (Ascend / MThreads fused small-row handling and chunked run counting; on the Ascend side, predecessor loads constrained within rows, fixing invalid addresses after reshape; 16-bit ordered-key histogram, workspace capped at 64 MiB); #6779 cumprod_ test switched to calling FlagGems directly; #6614 scaled_mm FP8 semantics fix and backend path optimization; #6881 cross-backend _fused_dropout (Generator-backed RNG).
  • KernelGen (Nvidia) 3: #5640 convolution_backward_overrideable (Triton kernel); #6528 philox_uniform (Triton kernel); #6902 classifying Triton kernel requirements for all definitions (adding 14 previously ignored compute paths to the classification).
  • Vendors and CI 8: #6347 Tsingmicro TX8110 backend added to the full operator test workflow (see 3.1); #6710 KMCompiler rnn_tanh backend compatibility fix; #6559 cudnn_convolution (Nvidia / Iluvatar / Hygon targets); #6944 Kunlunxin dswiglu and dreglu conflict fix; #6735 conftest acceleration option (–first-parameter-only); #6895 explicit API test batch; #6924 CI checkout switched to SSH-first (HTTP proxy fallback — proxy checkouts were measured to hang in ~59% of pre-check failure samples; SSH succeeded 16/16 in ~8 seconds).
  • Docs 2: #6912 cicd documentation (ops-test.yaml description), #6929 new optimization chapter.

1.3 FlagGems Under Review: High-Density Updates Across Kunlunxin / Ascend / SiliconFlow Lines (10-09 ~ 10-10)

Date: 2026-10-09 ~ 2026-10-10　Source: #6926 · #6935 · #6928 and others (see appendix)

  • Kunlunxin (a dozen-plus): tle.raw cluster kernel batch (#6926 upsample_bilinear2d etc., #6896 log_softmax_out long-row reduction, #6898 nonzero_numpy); device baselines (#6910 addmm, #6913 outplace_fused_experts, #6943 inplace_fused_experts skipping vllm in favor of torch); conv-series vendor launch-table paths (#6914 conv2d, #6918 conv_transpose2d, #6925 conv3d, #6934 conv_depthwise2d); CI fix (#6937).
  • Ascend (KMCompiler fix batch): #6935 igammac / polygamma autotune switched to device timers (fixing aclrtEventElapsedTime 507000 failure on first autotune on the 910B runner); #6946 index_fill bounds checking switched to native aminmax (fixing valid indices being rejected due to FlagGems dispatch re-entry, newly opened 10-10 08:39); #6930 Ascend cudnn_convolution (Triton kernel) newly opened.
  • SiliconFlow 5 newly opened (14:26 ~ 17:35): #6928 fused_adamw and tensor-LR overloads, #6927 stft / stft.center, #6942 triangular_solve, #6941 scatter_reduce launch cap and benchmark grouping, #6940 argsort test timeout and Ascend launch cap.
  • Others: KernelGen Nvidia backlog batch continues updating (special_* / rrelu / _scaled_mm_v2 etc.); DAMO XuanTie #6497 (PPU FlagTune Cost Model); #6923 Enflame CI migrated to flagcicd with flagtree bumped to 0.7.0; #6796 weekly test failure fix (41 operators).

1.4 FlagGems-Experimental: 5 KernelGen Nvidia Merges (10-09)

Date: 2026-10-09　Source: #673 · #684 · #703 and others (see appendix)

  • 5 merges (10:59 ~ 11:22): #673 sparse_bsr_tensor, #684 sparse_mask, #703 _version, #700 nested tensor storage offset, #656 _neg_view_copy — filling out sparse and metadata-class operators (all from the same contributor).
  • 8 under review updated: #693 dstack, #698 _coalesce, #696 slow_conv_transpose2d, #666 / #669 / #660 / #674 / #676 sparse series, etc.
  • Positioning: The KernelGen pipeline continues filling edge cases toward “full PyTorch operator coverage”; this window was dominated by sparse and tensor-metadata classes.

1.5 FlagTree: 6 Merges — TLE Test Matrix, RLC Enhancements, and PPU 3.6 Baseline (10-09)

Date: 2026-10-09　Source: #1333 · #1324 · #1316 and others (see appendix)

  • 6 merges: #1328 TLE normalize / fused add-normalize test cases on H100 (09:53); #1316 tle.gpu.alloc alias extended to mthreads / hcu (09:56); #1324 ppu3.6 FlagGems baseline and test workflows (ppu3.6-gems-baseline.yml / ppu3.6-gems-test.yml, 10:38); #1304 TLE cross-node all-gather tutorial (14:28); #1333 Nvidia TritonGPU RLC (RemoveLayoutConversions) enhancement component parsing — fixing hardcoded switches, missing FLAGTREE_RLC_ENHANCE in cache keys, tle.gpu.set_layout explicit layouts being ignored, and in-loop cvt failing to eliminate; the four-stage switches converted to pass options (7 files +1060/-153, 16:17); #1335 CI slow watchdog (git-clone-retry, 17:05).
  • 10 under review updated: #1337 SpacemiT build fix (patch setup.py, +82/-442); #1339 Iluvatar AABS — raising shrunken dot tiles back to the 16×16×16 TCU floor (fixing compile-time K>=16 check failures for small-channel convolutions); #1213 MUSA staged RLC port (off by default, 23 files +2545/-2063); #1330 XPU backend synced with internal triton (de4bf790); #1336 / #1273 / #1275 / #1306 Ascend XCS batch; #1189 PPU / MTHREADS integer dot; #1321 TLE-Raw backported to 3.5.x.

1.6 FlagQuantum: QBoson Merge, Phase 2 Wrap-Up, and Install UX Fix (10-09)

Date: 2026-10-09　Source: #598 · #604 · #605 (see appendix)

  • QBoson provider merge (12:13): The “QBoson provider and QDiffusion integration” opened on 10-08 landed officially — including Ising / QUBO conversion, precision evidence, bounded sampling, resumable task lifecycle, and provider billing reconciliation; the QDiffusion channel is pinned to Kaiwu 1.3.1 and offline-ready.
  • Phase 2 cleanup wrap-up (14:40 ~ 19:15, 5 PRs): #600 ~ #602 three batches of benchmark evidence archival, #603 CI requiring new evidence to carry retention metadata, #604 wrap-up documentation. Audit record: repo tree 2,996 files / 61,781,105 bytes, benchmark results 280 files / 23,664,402 bytes, exact duplicate blobs 0, removal candidates 0; explicitly establishing the governance stance that “size and zero-reference signals alone are insufficient to authorize deletion.”
  • Install UX and vocabulary migration: #605 “preventing seemingly stalled installs” under review (fix/install-ux branch pushed from 20:08); vocabulary migration continues — recording algorithm slices (10:30), WQ-5 wire vocabulary renamed to qubits (10:45).

1.7 FlagCX / build-infra: P2P Engine Integration Merged and 0.14.0-rc2 Packaging Backport (10-09)

Date: 2026-10-09　Source: FlagCX #641 · #645 · build-infra #1323 (see appendix)

  • FlagCX 3 merges: #634 (Ascend torch plugin stream handling and merged P2P fix, 17:42); #641 (P2P Engine integration — IBRC and BAREX connected to the shared P2P Engine, USE_SHARED_P2P_ENGINE switch, 22:33); #645 (0.14.0-rc2 packaging changes backported to main: wheel packaging, optional device bitcode and headers, torch_txda library search path; Hygon Torch API CI job updated in sync, 22:34).
  • Status changes: #643 (Hygon Device API and IR CI tests) closed without merge at 22:35; #646 (CICD async signal validation) newly opened at 23:40.
  • build-infra: #1323 / #1324 fix flagcx wheel build parsing of comment tags (main + release-2.2 backport, 17:28 / 17:29).
  • Assessment: The 0.14.0-rc2 packaging backport and wheel build fix appeared in the same window — dense early signals for the FlagCX version line; watch for the next release.

1.8 Other Lines: FlagGems-sglang / FlagSparse / FlagTrain / vllm-plugin-FL / docs, etc. (10-09 ~ 10-10)

Date: 2026-10-09 ~ 2026-10-10　Source: FlagGems-sglang #136 · FlagSparse #108 · Megatron-LM-FL #199 and others (see appendix)

  • FlagGems-sglang: #136 (uv-based CI environment setup) merged (13:23); roughly 20 competition Track1 PRs under review, supplementary candidate #137 (fill_padded_rows) updated at 13:28 — the competition channel has entered a “clearing the backlog” phase.
  • FlagSparse: #108 “q4 first ops” merged (15:02, NCIC-AlphaSparse; 119 files +12083/-642), the same batch including DCU / MUSA / MACA / XPU multi-backend sparse adaptations and CI checks; this repo has been merging in batches roughly every two days since late September.
  • FlagTrain: #5 blocked_flash merged (11:03) — targeting the Ascend / MetaX / DAMO XuanTie backends, marking the training operator line’s move into regular operation.
  • vllm-plugin-FL: vLLM 0.28 adaptation wave advanced overnight (10-10 00:07 ~ 01:12) — #487 Ascend 910C, #574 THead PPU, #576 Hygon updated in a burst; #566 Iluvatar CoreX BI-V150 adaptation (targeting the 0.4.0-dev line); #562 k8s GPU container CI; #546 Kunlunxin FlagTree compatibility hook discussion. Main-branch pushes fall outside the window (10-08).
  • Megatron-LM-FL: #198 Ascend native SwiGLU, #199 Biren SUPA platform support newly opened (details in 3.5 / 3.6).
  • Torch-FL: #487 CUDA compatibility design doc (new document cuda-compatibility.md) — including three-platform categories, two modes, per-boundary contracts, device identity architecture decisions, and per-platform acceptance gates (agent-drafted, marked ai-generated, human-reviewed).
  • docs and others: #543 HuggingFace model list, #546 ModelScope documentation (bot PRs) under review; FlagScale #1300 (PPU 810E training CI), FlagRelease #20 (migration pipeline refactor: 52 commits / 95 files +23146/-1789), FlagAttention #85 (minimax_sparse_attention sm_90 optimization), flir #78, FlagPerf #784 each had updates.

II. News Coverage and Ecosystem

2.1 Ecosystem Coverage: Domestic GPU “Four Little Dragons” Enter a System-Competition Phase (10-09)

Date: 2026-10-09　Source: Economic Daily News (United Daily News) · World Journal

  • Open Source Securities research note: The “four little dragons” — Moore Threads, MetaX, Biren, and Enflame — recorded combined revenue of roughly RMB 5.5 billion in H1 2026, having completed their “first leap” from chip R&D to stable cluster delivery, but not yet reaching broadly stable core profitability; the next phase of competition will shift to software maturity, effective cluster compute, supply chain, and customer service.
  • Relevance to FlagOS: Three of the four — Moore Threads, MetaX, and Enflame — are FlagOS member organizations; Biren also had Megatron-LM-FL #199 (SUPA platform support) under review in the same window (see 3.6) — “software maturity competition” directly echoes FlagOS’s positioning.
  • Inclusion criteria: An industry-background item (no direct transactional link to the FlagOS technical line), included as fundamental and industry-narrative background on member organizations.

2.2 Search and Official Channel Verification: Component Lines Remain Quiet, No New CSDN Posts (10-09 ~ 10-10)

Date: 2026-10-09 ~ 2026-10-10　Source: Google News RSS (24 Chinese and English query terms, via proxy) · HN Algolia · flagos.csdn.net · BAAI Hub

  • Component-term searches (14 groups including FlagOS / FlagGems / FlagScale / FlagTree / FlagPerf / FlagCX / KernelGen) returned zero hits within the window, continuing the quiet streak.
  • Ecosystem-term hits: 10: 1 included (see 2.1); 8 excluded (2 brokerage research notes, 2 funding and issuance statistics, 2 summit/conference promotions, 2 irrelevant English items); the remaining 1 was market follow-up commentary on DeepSeek’s Ascend component open-sourcing (09-30) — the event itself was already covered in the previous weekly report and is not re-included here.
  • Community and official channels: Seven HN Algolia queries returned no direct hits; the official CSDN column had no new posts within the window (latest content remains the September batch; the 10-10 page timestamp is a template refresh); no FlagOS-themed items appeared on the BAAI Hub homepage.

III. Member Deep Dive

3.1 TsingMicro: TX8110 Backend Enters FlagGems Operator Test CI (10-09)

Date: 2026-10-09　Source: FlagGems #6347

  • #6347 (merged 10:54): Registers and enables the TsingMicro TX8110 backend in the FlagGems full operator test workflow (ops-test.yaml); adds .github/configs/backends/TX8110.yml — vendor: TsingMicro, self-hosted runner label tx8110-flaggems-weekly, container image harbor.baai.ac.cn/flaggems/flaggems-test-tsingmicro-tx8110:20260915 (container network per vendor reference config, without –network=host).
  • Reuses existing wiring: The existing tsingmicro backend path (chip check script, run_tests.py, and TXDA_VISIBLE_DEVICES environment variable) — establishes periodic operator regression for TX8110.
  • Significance: TsingMicro’s (reconfigurable computing route) chip adaptation moves from “backend onboarding” to “continuous integration regression,” a landmark step in deepening member adaptation.

3.2 Kunlunxin: Fix Batch Merge and tle.raw Performance Line (10-09)

Date: 2026-10-09　Source: FlagGems #6944 · #6926 · #6896 · FlagTree #1330

  • Merged: #6944 resolves the operator conflict between dswiglu and dreglu (20:23).
  • Under review: tle.raw cluster kernels (#6926 upsample_bilinear2d etc., #6898 nonzero_numpy, #6896 log_softmax_out); device baselines (#6910 addmm, #6913 / #6943 fused_experts two paths); conv series (#6914 / #6918 / #6925 / #6934); CI (#6937).
  • Compiler side: FlagTree #1330 XPU backend syncs with internal triton (single squashed commit, three-layer independent verification, updated 10-10 09:17).
  • Inference side: vllm-plugin-FL #546 Kunlunxin FlagTree compatibility hook discussion (updated 10-10 00:28).

3.3 Moore Threads: SDPA Kernel Optimization and RLC Porting Progress (10-09 ~ 10-10)

Date: 2026-10-09 ~ 2026-10-10　Source: FlagGems #6878 · #6919 · #5981 · FlagTree #1213

  • Merged: #5981 (sort radix pipeline optimization, 15:08), #6919 (small-output matmul split-K optimization, 15:11).
  • Under review: #6878 SDPA Triton forward kernel optimization — the shared kernel is ~15x slower than native MUSA SDPA on MTT S5000 (~12.9 ms vs 0.84 ms); this PR closes most of the gap with row-major K loading and a mask-free KV loop, and subsequent commits (single-level KV loop + constexpr context) reach 1.98x on target workloads (updated 10-10 00:28).
  • Compiler side: FlagTree #1213 ports staged RemoveLayoutConversions (RLC) to MThreads (off by default).
  • Inference side: vllm-plugin-FL #575 (MUSA adaptation for vLLM 0.28) updated overnight.

3.4 Hygon / Iluvatar: conv Operator Line and BI-V150 Adaptation (10-09 ~ 10-10)

Date: 2026-10-09 ~ 2026-10-10　Source: FlagGems #6559 · FlagCX #645 · vllm-plugin-FL #566 · FlagTree #1339

  • Hygon: cudnn_convolution (#6559, multi-target Nvidia / Iluvatar / Hygon) merged; FlagCX #645 syncs updates to the Hygon Torch API CI job (build from repo root, import from src); vllm-plugin-FL #576 (Hygon vLLM 0.28 CI image and deployment guide) updated 10-10 01:03; FlagCX #643 (Hygon Device API and IR CI) closed unmerged at 22:35.
  • Iluvatar: FlagGems #6298 (conv2d optimization) updated; FlagTree #1339 (AABS raises back the 16×16×16 TCU lower bound) newly opened; vllm-plugin-FL #566 (CoreX BI-V150 adaptation for vLLM 0.28, targeting the 0.4.0-dev line) updated.

3.5 DAMO XuanTie / Ascend: PPU 3.6 CI and Ascend Fix Batch (10-09 ~ 10-10)

Date: 2026-10-09 ~ 2026-10-10　Source: FlagTree #1324 · FlagGems #6935 · Megatron-LM-FL #198 · FlagScale #1300

  • DAMO XuanTie (PPU): FlagTree #1324 (ppu3.6 FlagGems baseline and test workflow) merged (10:38); #1189 (PPU / MTHREADS integer dot contract) updated; FlagGems #6497 (PPU FlagTune Cost Model) updated 19:23; FlagScale #1300 (PPU 810E training CI) updated 18:57; vllm-plugin-FL #574 (THead PPU adaptation for 0.28) updated 10-10 00:37.
  • Ascend: FlagGems KMCompiler fix batch — #6935 (autotune timer), #6946 (index_fill boundary validation, newly opened 10-10 08:39); #6930 (Ascend cudnn_convolution) newly opened; FlagTrain #5 (blocked_flash, including Ascend target) merged; Megatron-LM-FL #198 Ascend-native SwiGLU (via torch_npu.npu_swiglu / npu_swiglu_backward, covering FP16 / BF16 / FP32, with tests); vllm-plugin-FL #487 (Ascend 910C vLLM 0.28) updated overnight.

3.6 Other Members: MetaX / Enflame / Cambricon / Horizon Robotics / Biren (10-09 ~ 10-10)

Date: 2026-10-09 ~ 2026-10-10　Source: FlagGems-vllm #840 · FlagGems #6923 · Megatron-LM-FL #199

  • MetaX: FlagGems-vllm #840 (fused Marlin MoE dual backend for W4A16 / W8A16) updated 19:10; FlagTrain #5 blocked_flash includes MetaX target (merged).
  • Enflame: FlagGems #6923 migrates Enflame CI to flagcicd and upgrades flagtree to 0.7.0 (updated 19:59).
  • Biren: Megatron-LM-FL #199 “Biren SUPA platform support” newly opened — integrates at the plugin layer via an independent torch device type supa (torch_supa remaps torch.cuda calls to the SUPA device, distributed backend BCCL), with accompanying platform registration and signal handling changes.
  • Cambricon, Horizon Robotics: No new public activity within the window.

IV. Summary and Trend Observations

  1. Adjusted working days sustain high activity with broader coverage: 45 merges (below the previous period’s 63) across 10 repos, with 52 commits and 147 under-review updates maintaining post-holiday intensity; vendor side (TsingMicro / Kunlunxin / Ascend / SpacemiT / Iluvatar) and contributor side (SiliconFlow 9, KernelGen batch) are both densely active.
  2. TsingMicro TX8110 enters continuous regression: #6347 registers the TX8110 backend into the full operator test workflow (self-hosted runner + official container image) — member adaptation moves from “onboarding” to “periodic regression,” a reusable template for deepening adaptation.
  3. SiliconFlow’s 9-PR batch in a single window: 4 merges + 5 new opens, covering operators including mode / cumprod_ / scaled_mm / fused_dropout / _fused_adamw / stft / triangular_solve, targeting mainly Ascend and Moore Threads — third-party inference optimization teams’ contributions are taking a batched form.
  4. Version and governance lines active: FlagCX 0.14.0-rc2 packaging back-merge to main and the build-infra wheel tag resolution fix appear in the same window (an early signal of the version line); FlagQuantum closes out Phase 2 repo cleanup with 5 merges (establishing the principle that “size and zero references are insufficient to authorize deletion”); Torch-FL adds a CUDA compatibility design doc (aligning with the #486 roadmap).
  5. vLLM 0.28 adaptation wave advances overnight: PRs from five vendors — Ascend / DAMO XuanTie PPU / MUSA / Hygon / Iluvatar — cluster in updates from early morning to late morning on 10-10 — the version-line shift in the inference plugin layer is still underway, with multiple landing points under review.
  6. Next watch points: The first merge landing point of the vLLM 0.28 adaptation batch; the FlagCX 0.14.x version line; when the first new Release since 09-28 appears; progress on clearing the sglang competition backlog PRs (~20); the default-enable path for FlagTree RLC enhancements on the MUSA side.

Appendix: Source Verification Table

Category Source Verification Method Result
GitHub org: flagos-ai repos API Full verification of pushed_at across 54 repos 11 repos had pushes within the window (FlagGems / FlagQuantum / FlagCX / FlagTree / build-infra / FlagGems-vllm / FlagSparse / FlagGems-sglang / FlagGems-Experimental / FlagTrain / docs); no new repos
GitHub Commit search (committer-date basis) Full item-by-item verification of 52 commits FlagGems 17 / FlagQuantum 8 / FlagSparse 5 / FlagGems-Experimental 5 / FlagTree 5 / FlagGems-sglang 4 / FlagCX 3 / build-infra 2 / FlagGems-vllm 2 / FlagTrain 1
GitHub Merge search (is:merged) Item-by-item verification of 45 merges All later than the previous cutoff (10-09 06:00); FlagGems 18 / FlagTree 6 / FlagQuantum 6 / FlagGems-Experimental 5 / FlagCX 3 / build-infra 2 / FlagGems-vllm 2 / FlagSparse 1 / FlagGems-sglang 1 / FlagTrain 1
GitHub Open search (is:open) 147 updates; sampled 100 for verification FlagGems 58 / vllm-plugin-FL 10 / FlagTree 10 / FlagGems-Experimental 8 / docs 2 / FlagGems-vllm 2 / Megatron-LM-FL 2 / remaining 8 (FlagAttention / FlagCX / FlagQuantum / flir / FlagScale / FlagRelease / FlagPerf / Torch-FL 1 each)
GitHub Branch and atomic source spot checks FlagSparse / docs default branches + org event stream Consistent with commit search; docs main branch top entry remains 10-03, the 10-10 06:48 push is a bot branch update (PR #543)
Releases Tag / Release atomic verification 24 repos’ releases + 6 repos’ tags No new tags / new Releases within the window (latest remains the 09-28 ~ 10-01 batch)
News Google News RSS (24 sets of Chinese and English query terms, via proxy) 28-hour window filtering + item-by-item review 10 hits: 1 included, 8 excluded, 1 is a continuation comment on an already-included event (09-30) not re-included
Community HN Algolia Review of 7 query sets No direct hits
Official channels CSDN column / BAAI Hub Page scraping review CSDN has no new articles within the window (the 10-10 page timestamp is a template refresh); no FlagOS entries seen on the BAAI Hub homepage
Historical comparison 10-09 daily report (previous issue) Deduplication verification Previous issue covered through 10-09 06:00; all 45 merges in this issue are later than that cutoff, no duplicates

Complete Source List