Research window: 2026-09-09 10:18 ~ 2026-09-10 10:18 Beijing Time Sources: GitHub (org: flagos-ai, 52 repos pushed_at + 135 commit search records fully verified by committer-date + per-repo default branch re-check + branch API + commit details), Google News RSS (20 query sets in Chinese and English, via proxy), HN Algolia, Tavily/web search, FlagOS CSDN official account (see appendix)

Index

    1. Open-Source Project Progress (GitHub Activity)
      • 1.1 build-infra: Ascend 910C base/runtime backend dual-track additions, 60 app image changelog baselines landed (09-09/09-10)
      • 1.2 FlagGems main repo: KernelGen operator flow maintains high velocity, KMCompiler multi-backend expands further (09-09/09-10)
      • 1.3 FlagGems-Experimental: Hygon-specific flash attention operators merged, Iluvatar/MThreads dual-track batch (09-09/09-10)
      • 1.4 Inference plugin layer: DAMO XuanTie PPU fused persistent_topk, Arm CPU Qwen W4A8/GDN, sglang operator configuration (09-09)
      • 1.5 Domain libraries and toolchain: FlagBLAS Ascend L3 triple merge, FlagTree TLE multi-card communication, FlagCX full CICD coverage (09-09)
      • 1.6 Other components: libtriton_jit typed device pointers, FlagScale documentation, FlagOS-Robo support matrix adds KERV (09-09)
    1. News Coverage and Ecosystem
      • 2.1 Beijing’s “15th Five-Year Plan” digital economy plan names Zhongzhi (FlagOS) and Lingji (LinkeeOS), strengthens RISC-V intelligent computing instruction set (09-09)
      • 2.2 Eighth consecutive quiet window for component-level news; routine content updates on BAAI Community (09-09)
    1. Member Company Deep Dive
      • 3.1 Moore Threads: JD Cloud announces 100,000-card cluster built on its GPUs (09-09)
      • 3.2 Enflame: STAR Market listing on September 11, issue price 142.18 yuan/share (09-09)
      • 3.3 Hygon: Token operations “dual-chip” acceleration solution, CPU+DCU connects the token closed loop (09-09)
      • 3.4 MetaX and Moore Threads: lock-up expiry and secondary market volatility (09-09)
    1. Summary
  • Appendix: Complete Source List

I. Open Source Project Progress (GitHub Activity)

Window Overview: Of the 52 repositories in the org, 18 had pushes during the window; commit search returned 135 in-window commits (5 pages), distributed across 14 repos (FlagGems-Experimental 60, FlagGems 39, build-infra 9, FlagBLAS 8, FlagTree 4, FlagCX 2, FlagGems-sglang 2, vllm-plugin-FL 2, FlagSparse 2, FlagOS-Robo 2, FlagAttention 2, libtriton_jit 1, FlagScale 1, FlagGems-vllm 1); another 4 repos (sglang-plugin-FL, docs, FlagTree-AscendNPU-IR, release-info) had in-window pushes verified via default branch and branch API as PR branch activity. No new repos, no new component releases.

This window’s shape = dual track of “engineering infrastructure + operator matrix” during the RC1 test stabilization period: On the delivery side, the largest action landed in build-infra (new Ascend 910C backend + changelog baseline and gating for 60 app images); on the code side, the operator auto-generation pipeline continued at high velocity (39 commits in the main repo + 60 in the experimental repo); domain libraries and toolchains saw substantive capability expansions such as three consecutive FlagBLAS Ascend L3 commits and FlagTree TLE multi-card communication.

1.1 build-infra: Dual-track addition of Ascend 910C base/runtime backends, changelog baseline for 60 app images lands (09-09/09-10)

Sources: build-infra #803 (09-09 20:27), #801 (09-09 13:42), #802 (09-09 20:22), #807 (09-10 09:38), #799/#800 (09-09 10:42/10:43), #804, #805, #806

  • New Ascend 910C backends (#803): Added ascend-cann8.5.0-910c / ascend-cann9.0.0-910c dual backends, enabling the same CANN line to build for Ascend 910C chips. The 910C chip-specific ops package uses the A3 token (Ascend-cann-A3-ops); the two base Containerfiles are byte-identical to their 910B siblings, differing only in the PRODUCT ARG default (910b→A3) and the file header. This window extends the Ascend chip matrix from 910B to 910C for the first time.
  • Deliberately scoped containment: The new configs.yaml block intentionally omits deps_app and env.app.*, keeping the 910C backend out of the app build matrix for now (the presence or absence of deps_app is the gate for app inclusion), to be opened up after app artifacts are produced and verified—following the established cautious onboarding order of “base/runtime first, apps later.”
  • Incidental vendor parsing fix: The vendor split in three verify scripts was changed from last-hyphen (${VAR%-*}) to first-hyphen (${VAR%%-*}), aligning with generate_matrix.py / verify_base.py; the old logic would parse a vendor name not in run.vendors under double-hyphen keys like ascend-cann9.0.0-910c, resulting in empty run flags. Accompanied by #804 (910B runner overrides forcing the 910b label) and #806 (910C base builds using runner proxy build-args).
  • Changelog baseline for 60 app images (#801): Established YAML baselines under app/<app>/changelogs/ for all 60 app images published by flagos-app, recording per-image the current registry-resident tag and its build history (new→old), with each entry containing the rebuild reason, push_time date, and the upstream PRs included; old tags no longer carried by the registry are folded into the history of their successor entries (becoming their only trace). Accompanied by #802 (backfilling dates from registry push_time) and #807 (enforcing changelog gating on push). Delivery traceability upgraded from “image tag records” to “per-image change history.”
  • Dual-track registration of Moore Threads Megatron app images (#799/#800): Recorded app image tag 2.1.2-0.3.0_rc0.post1_3.g6e8d7ffc7 for both the mthreads-musa4.3.6 and mthreads-musa5.2.0 lines. Additionally, #805 pinned external GitHub Actions to full commit SHAs (supply chain hardening).

Interpretation: The way Ascend 910C was onboarded is noteworthy—it did not open a new technical track, but treated 910C as a “chip-isomorphic variant of the 910B line”: byte-level Containerfile reuse, only swapping the ops package token, and using the absence of deps_app to keep the new chip out of the app matrix. This is a concrete projection of the RC test-period discipline of “new adaptations allowed, new features not” onto multi-chip engineering: new hardware only gets a skeleton, without disturbing the existing delivery surface. The combination of the 60 app image changelog baseline + push gating advances build-infra from “recording what happened” to “enforcing an explanation of why,” signaling a tightening of the audit surface ahead of 2.2 GA.

1.2 FlagGems main repo: KernelGen operator flow maintains high velocity, KMCompiler expands across more backends (09-09/09-10)

Sources: FlagGems #5957 (QC/PPU W8A16 RMSNorm, 09-09 10:29), #5871 (GLU TLE auto-tuning, 09-09 10:43), #6094 (KMCompiler Iluvatar gru, 09-09 12:15), #5960 (KMCompiler Ascend/Metax linalg_matrix_power, 09-09 12:16), #6119 (CI/CD rule-check-required, 09-09 15:41), #6090 (remove metax-maca3720)

  • The main repo had 39 in-window commits, the densest window recently. The bulk is the [KernelGen][Nvidia] series of operator merges (about 25), covering hardtanh (moved into ops), cummax_helper, _nested_from_padded_tensor, _nested_tensor_from_mask_left_aligned, _nested_view_from_jagged, conv_tbc_backward, conv_transpose3d, matrix_exp_backward, max_pool1d, sum_to_size, embedding_renorm, cosine_embedding_loss, cov, corrcoef, cumulative_trapezoid, fft_irfftn, special_xlogy, _sparse_semi_structured_addmm, the fake_quantize series, and nuclear_norm; merges continued on 09-10 from 09:03 to 09:52 (corrcoef/cov/cumulative_trapezoid merged in the same minute).
  • KMCompiler generation path continues to expand vendors: Iluvatar gru (Triton kernel, #6094), Ascend + Metax in the same batch for linalg_matrix_power (#5960). The previous window recorded linalg_matrix_exp producing seven backends at once; this window the linalg matrix function family continues to be filled in via “develop once, land on multiple backends.”
  • Quantization operators extend further to DAMO XuanTie PPU: QC PPU W8A16 RMSNorm (#5957); on the performance side, the GLU kernel switched to TLE auto-tuning (#5871).
  • 5 engineering items: CI switched to three-dot diff to derive PR changed files (#6097); added the rule-check-required job and CICD docs (#6119); the unittest workflow gained concurrency control with two expression syntax fixes on 09-10 (#6137 et al.); removed the metax-maca3720 CI entry (#6090, vendor CI line adjustment); [Fix] made MM tests and benchmarks respect FlagTune environment settings (#6129), fixed all/any division by zero, nextafter NaN propagation, and structured JSON output for two benchmarks.

Interpretation: KernelGen’s output velocity rebounded from 12 commits/half-day in the previous window to about 25 commits/half-day in this window, indicating that “AI auto-generated operators” is now a常态化 pipeline rather than a batch event—this corroborates the 60 merges in the experimental repo in 1.3. The distribution of operational surface in this window also shows the current engineering focus: during the 2.2 freeze period, all new capabilities go through “generator operator supplementation + vendor backend specialization,” with zero hand-written architectural changes; on the CI side, constraints were actually increased (three-dot diff, rule-check-required, concurrency control), a typical move to tighten delivery discipline before GA.

1.3 FlagGems-Experimental: Hygon-specific flash attention operator lands, Iluvatar/MThreads dual-line batch (09-09/09-10)

Sources: FlagGems-Experimental #597 (Hygon _flash_attention_forward, 09-10 08:44), #598 (Hygon adaptive_avg_pool2d_backward, 09-09 17:28), #604 (MThreads var, 09-10 09:11)

  • The experimental repo had 60 in-window commits, by backend: Iluvatar about 36 (special function family, pooling backward, linalg_svdvals, histc, median, mvlgamma, matmuladd, etc.), MThreads about 16, Ascend 3 (special_erfinv, unsafe_masked_index, zero), Hygon 2.
  • Hygon-specific flash attention lands (#597): Added a _flash_attention_forward specialized implementation for the Hygon DCU backend, with the file placed under src/flag_gems/runtime/backend/_hygon/ops/, submitted by a developer on the BAAI side. Previously this backend had only lightweight operators such as _amp_foreach_non_finite_check_and_unscale_ in the experimental repo; a specialized attention operator is a first.
  • The other Hygon operator is adaptive_avg_pool2d_backward (#598). Both entered the default branch on the same day or the next day.
  • Engineering side: the experimental repo also added unittest workflow concurrency settings (two revisions on 09-09 at 13:39 and 19:54).

Interpretation: The landing points of the two Hygon commits are more informative than the operator count—_flash_attention_forward is a core operator on the attention path; on 09-08 the main repo had just fixed the BLOCK_M tiling defect in the Hygon backend’s flash attention, and this window the specialized implementation landed, forming a relay of “fix the general path first, then add the specialized implementation.” Iluvatar (Tianshu Zhixin) with 36 commits in a single window remains the largest source of capacity in the experimental repo, forming a division-of-labor loop with the main repo’s KMCompiler Iluvatar gru: “batch validation in the experimental repo → generation/release via KMCompiler in the main repo.”

1.4 Inference plugin layer: DAMO XuanTie PPU fused persistent_topk, Arm CPU Qwen W4A8/GDN, sglang operator configuration (09-09)

Sources: FlagGems-vllm #754 (09-09 19:58), vllm-plugin-FL #433 (09-09 15:35), #474 (09-09 17:40), FlagGems-sglang #60 (09-09 18:56)

  • DAMO XuanTie PPU fused persistent_topk (FlagGems-vllm #754): Added and registered persistent_topk.py (2394 lines) under runtime/backend/_thead/fused/, targeting T-Head PPU-ZW810E; generated by KMCompiler. In the previous window (09-08) this operator’s tests/benchmarks had just been changed to be self-testable independently of the vLLM native op (#747); this window the formal implementation and registration landed.
  • Arm CPU-side Qwen quantized inference (vllm-plugin-FL #433): Integrated Qwen’s packed W4A8 and GDN (Gated Delta Net) paths on CPU, an extension of the plugin layer to Arm CPU inference scenarios.
  • KV cache consistency fix (#474): Restored the FlagGems KV cache update from #382 (attention path regression fix).
  • sglang plugin operator configuration (FlagGems-sglang #60): Added an operators configuration file, making the set of enabled operators on the sglang plugin side configurable.

Interpretation: The four items point to the same thing—the plugin layer is filling in configuration surfaces and specialized operators for “multi-framework × multi-chip × multi-deployment form.” XuanTie PPU’s persistent_topk completed the two-step journey from “self-testable” to “registered”; Arm CPU’s W4A8/GDN extends the plugin layer’s scope from accelerator cards to the CPU inference stack; sglang operator configurability lowers the cost of tailoring operator sets per chip. Together, the three indicate that the inference plugin layer has entered a mature engineering phase of “per-kernel vendorization + configuration surface governance.”

1.5 Domain libraries and toolchains: Three consecutive FlagBLAS Ascend L3 merges, FlagTree TLE multi-card communication, FlagCX full CICD coverage (09-09)

Sources: FlagBLAS #102/#104/#105 (09-09 11:22/14:35/15:03), FlagTree #1048 (09-09 16:56), #1123, #1099 (09-09 22:25), FlagCX #573/#575 (09-10 01:28/09:35)

  • Three consecutive FlagBLAS Ascend L3 merges: On the same day, TBMV (#102) → TBSV (#104) → TPSV (#105) were merged in sequence, adding Ascend support for three eigenvalue/triangular matrix operations, along with cleanup of the redundant operator export list (#103). Following the batch merge of Ascend L2 routines on 09-07, this window continues to push the BLAS routine matrix toward L3.
  • Four FlagTree commits: The TLE distributed primitive distributed_barrier gained multi-GPU communication support (#1048); CI added the hcu qwen benchmark (#1123); on the XPU side, xpu-sdnn-objects was upgraded to v0.3.6.6.1 to fix int8 dot failures (#1099); [FlagTune] preserves caller-stream invocation order in CUDA graph benchmarks (#1129).
  • Two FlagCX CICD commits: Expanded CICD coverage to all cooperative modes and all team/operation combinations (#573/#575), i.e., exhaustive test coverage of the communication library’s cooperative mode combinations.

Interpretation: The three lines differ in nature but align in direction—during the test period, “coverage” is the primary lever. FlagBLAS fills out Ascend’s BLAS capability surface with L3 routines, FlagCX pushes CICD coverage to the boundary with combinatorial exhaustion (multi-card communication correctness is a key risk item in the 2.2 multi-chip matrix test window), and FlagTree pushes TLE’s multi-card primitives from “usable” to “multi-card communication usable.” The entry of the hcu qwen benchmark into CI indicates that end-to-end model benchmarks on the Ascend (hcu) side have been incorporated into routine validation.

1.6 Other components: libtriton_jit typed device pointers, FlagScale docs, FlagOS-Robo support matrix adds KERV (09-09)

Sources: libtriton_jit #65 (09-09 10:56), FlagScale #1290 (09-09 10:49), FlagOS-Robo #12 (09-09 14:21), FlagSparse #55 (09-09 17:35), FlagAttention #41/#52 (09-09 10:44/10:48)

  • libtriton_jit #65: Merged the typed device ptr feature branch, strengthening pointer type handling in the Triton JIT layer.
  • FlagScale #1290: A single documentation commit only (annotating the main commit corresponding to the qwen3.5 training guide); no code merges in the training stack this window.
  • FlagOS-Robo #12: The README support matrix added a KERV (VLA, OpenVLA-7B) entry, supporting training and inference (serve/evaluate not yet available), and addressed KERV support matrix review comments alongside the PR. On 09-07 FlagScale had merged the KERV embodied speculative decoding integration; this window formally writes that capability into FlagOS-Robo’s support matrix.
  • FlagSparse #55: merge_with_spsv (sparse matrix-vector multiplication fusion) merged. FlagAttention merged two PRs (#41/#52). FlagGems-sglang see 1.4.

Interpretation: FlagOS-Robo’s KERV entry is the final step of “capability landing → matrix registration,” indicating that the embodied intelligence toolchain’s model coverage is expanding quarterly (PI0/PI0.5/RoboBrain-2.0/2.5/RoboBrain-X0/Qwen-GR00T/GR00T-N1.5/KERV now form an 8-category model matrix). FlagScale and FlagAttention had only documentation/merge activity this window, representing low-code activity during the RC test period, complementing the main repo’s high operator velocity in 1.2: training stack converging, operator library expanding.

II. News and Ecosystem

2.1 Beijing’s “15th Five-Year Plan” Digital Economy Plan Names FlagOS and LinkeeOS, Strengthening RISC-V AI Computing Instruction Set (09-09)

Sources: Securities Times: After-hours, good news arrives! Beijing, major policy document (09-09 18:51), East Money: Beijing issues major development plan (09-09), Cailian Press: Beijing’s “15th Five-Year Plan” high-precision and advanced industries development plan (09-09), Sina Tech repost (09-09 16:05)

  • After market close on September 9, the Beijing Municipal People’s Government issued on the same day both the “Beijing ‘15th Five-Year Plan’ High-Precision and Advanced Industries Development Plan” and the “Beijing ‘15th Five-Year Plan’ Digital Economy Development Plan.” In the “enhancing self-controllable development level” section, the digital economy plan explicitly states: “Advance full-stack independent innovation in AI computing infrastructure, strengthen RISC-V AI computing instruction set innovation, deepen the FlagOS open-source ecosystem, and establish the LinkeeOS agent operating system.”
  • The same paragraph also proposes “accelerating the construction of a domestic advanced computing iterative verification platform, enhancing the capability to build 100,000-card computing clusters, and leveraging the Beijing-Tianjin-Hebei national hub node of the national integrated computing network to accelerate domestic technology verification,” and calls for “promoting deep integration of Xinchuang software and hardware with artificial intelligence.”
  • The corresponding language in the high-precision and advanced industries plan is “enhancing AI system software stack capabilities, accelerating the deployment of new domestic computing architectures” and “cultivating open-source projects and communities with international influence, building a global developer collaborative innovation hub” — meaning that the system software stack and open-source community have been incorporated into the municipal-level industrial plan’s target system.
  • LinkeeOS was previously initiated under the guidance of the Beijing Municipal Bureau of Economy and Information Technology, jointly by the Beijing Tongminghu Information Technology Application Innovation Center and industry partners (preliminary core results released in 2026-05). This is its first appearance alongside FlagOS in a municipal five-year plan document.

Interpretation: This is the first time FlagOS has entered a Beijing municipal five-year plan-level policy document, and it is listed in the same policy sentence alongside RISC-V AI computing instruction set innovation, 100,000-card cluster construction capability, and an agent operating system — meaning FlagOS’s role has risen from “an open-source project led by BAAI” to the designated system software stack carrier for Beijing’s self-controllable computing infrastructure. The direct implications for the community are threefold: first, the roadmap after 2.2 GA (09-24 test window deadline) will likely need to align with the construction pace of the “domestic advanced computing iterative verification platform”; second, “strengthening RISC-V AI computing instruction set innovation” is consistent with the direction of RISC-V operator backends such as DAMO XuanTie PPU and SpacemiT (see 1.4 XuanTie fused persistent_topk in this issue), and the weight of the RISC-V backend within FlagOS may increase; third, the pairing of LinkeeOS with FlagOS suggests that the layered positioning of “system software stack + agent operating system” has been confirmed by policy.

2.2 Eighth Consecutive Quiet Window for Component-Level News; Routine Content Updates on BAAI Hub (09-09)

Sources: Google News RSS (via proxy), HN Algolia, FlagOS CSDN official account (flagos.csdn.net), BAAI Hub (hub.baai.ac.cn)

  • gnews component keywords (FlagOS/FlagGems/FlagScale/FlagTree/FlagPerf/FlagAttention/FlagCX/KernelGen/FlagOS-Robo/FlagQuantum, when:1d~14d, Chinese and English) had zero hits during the window — the eighth consecutive quiet window for component-level news since 09-03. The only search result matching the literal “FlagOS” was a repost of the aforementioned Beijing plan (see 2.1), which is listed separately.
  • HN Algolia: All four queries for FlagOS/FlagGems/FlagScale/FlagTree returned irrelevant Show HN entries that were substring false matches on “flags/flagship” (Mario 64 emulation, Agent Router, Locksmith, etc.), all of which were excluded.
  • BAAI keyword queries returned 23 hits during the window, all routine BAAI Hub content (AI+pharma CPHI forum agenda, CV paper reading guides, AI dispute adjudication standards, AI Native R&D organizations, OpenAI next-gen model rumors, etc.), with no direct relevance to the FlagOS technology stack, and thus not included as technical items.
  • No new articles on the FlagOS CSDN official account: The latest content remains the 08-28 GLM-5.3-Flash Day0 adaptation across 9 chips; the 09-07 Shanghai KubeCon “Open AI Computing” forum and the 09-03 “Operator Island” SGLang operator competition replay remain pinned, the KernelGen operator tuning topic introduction page has no publication timestamp update, and there are no new event announcements.

Trend over the past 3 days (engineering side, for reference): 09-07 FlagOS 2.2 RC1 manifest branch cut + first round of rc1.post1 tag wave across 12 repos; 09-07 FlagScale KERV embodied speculative decoding integration and Megatron-LM v0.18.2 dual-repo alignment; 09-08/09-09 consecutive build-infra delivery records (Hygon dtk26.04 dual-framework closed loop, Tsingmicro mainline image, provenance tag automation); 09-09/09-10 this window’s build-infra Ascend 910C backend and 60-image changelog baseline.

III. Deep Dive on Member Organizations

3.1 Moore Threads: JD Cloud Announces Building a 100,000-Card Cluster on Its GPUs (09-09)

Sources: Sina Finance via Beijing News: JD Cloud and Moore Threads Partner to Build a 100,000-Card Domestic Intelligent Computing Cluster (09-09 14:03), Xinhua Finance/China Securities Journal (09-09 14:28), NetEase via Southern Metropolis Daily (09-09)

  • On September 9 at the 2026 JD Global Technology Explorer Conference, JD Cloud announced plans to build a 100,000-card full-function GPU cluster, using Moore Threads’ full-function GPUs as the computing foundation, focusing on key areas such as large model training, inference, and embodied intelligence, and opening computing power to the entire industry.
  • The two parties position this as full-stack collaboration across “chip — cloud platform — model training,” driving iteration of JD’s entire JoyAI large model lineup and building a closed loop from “data → training → simulation → deployment.” Cao Peng, Chairman of JD Group’s Technology Committee and President of JD Cloud, and Zhang Jianzhong, founder of Moore Threads, each made statements; Moore Threads said this marks the first time domestic GPUs have entered a top-tier AI cloud provider’s 100,000-card-scale core intelligent computing cluster.
  • Background reference: In March of this year, Moore Threads disclosed a major contract worth RMB 660 million for a “Kuae” intelligent computing cluster; during the same period, Zhipu disclosed that it had deployed a 1GW-class domestic computing data center, and MiniMax revealed it was advancing domestic chip adaptation for M3/H3.

Interpretation: This is a milestone-level event for a member organization in “large-scale commercial deployment of domestic computing power,” and it is directly relevant to FlagOS’s software stack positioning—for a 100,000-card-scale cluster to be deployed, a cross-chip training/inference system software stack is a necessity, and there is a clear intersection between FlagOS’s member organization matrix (Moore Threads is an early member) and JD Cloud’s positioning of “opening computing power to the entire industry.” It is also worth noting that the cluster explicitly lists embodied intelligence as a key area, aligning with FlagOS-Robo’s positioning (this issue’s 1.6 support matrix adds KERV).

3.2 Enflame: STAR Market Listing on September 11, Issue Price RMB 142.18/Share (09-09)

Sources: Guandian via Sina Finance: Enflame Technology Shares to List on STAR Market on September 11 (09-09 19:34), JRJ: Issue Price RMB 142.18/Share (09-09), Lieyun via Sohu (09-09)

  • On the evening of September 9, Enflame Technology announced that its shares will be listed on the Science and Technology Innovation Board of the Shanghai Stock Exchange on September 11, 2026, under stock code 688801, at an issue price of RMB 142.18/share, with 43,035,173 shares issued (10% of total share capital after issuance).
  • The company expects revenue of RMB 2.3 billion to 3 billion for January-September 2026, a year-on-year increase of 325.78% to 455.36%; the issue price corresponds to a 2025 diluted static price-to-sales ratio of 61.80x. As of the announcement date, the company had not yet turned profitable and will be included in the STAR Market Growth Tier after listing.
  • This IPO plans to raise RMB 6 billion for R&D and industrialization of fifth-generation and sixth-generation AI chip series products. After listing, the “four little dragons of domestic GPUs” (Moore Threads, MetaX, Biren, Enflame) will all be present in the capital markets.
  • FlagOS-related records: Enflame entered FlagScale training CICD for the first time in the 09-09 reporting window (ZIXIAOC200 chip image contract); its previous records were concentrated in the build-infra sglang 0.5.18 delivery line.

Interpretation: Enflame’s listing itself is a capital markets event, but it has practical implications for the FlagOS ecosystem—after member organizations secure RMB 6 billion-class fundraising, investment on the software stack side (FlagTree backends, vllm/sglang plugins, build-infra delivery lines) typically increases accordingly. Combined with the fact that its training-side CICD was just added in the previous window, Enflame’s participation in the chip matrix for 2.2 and subsequent versions is worth tracking.

3.3 Hygon: “Dual-Chip” Acceleration Solution for Token Operations, CPU+DCU Connecting the Token Closed Loop (09-09)

Sources: Sina Finance: Hygon Releases Token Operations “Dual-Chip” Acceleration Solution (09-09), NetEase: Hygon Debuts AI Computing Innovation Architecture (released 08-27, token economy theme)

  • Hygon Information released a “dual-chip” acceleration solution for Token operations: using Hygon CPUs as the intelligent scheduling hub and DCUs as the accelerated computing engine, the dual chips work together to connect the Token business loop of “production — scheduling — metering — cost accounting — application monetization — repeat purchase and expansion,” primarily suited to operational scenarios.
  • This solution is the implementation form of its “Agent to Token Open Computing Architecture” first unveiled at the Big Data Expo in late August: CPUs handle the Agent business flow hub (five major modules: data preprocessing, multi-agent sandbox isolation, task orchestration, tiered memory storage, and vector database retrieval), while DCUs handle parallel acceleration on the token generation side (batch decoding, KV cache optimization, long-sequence support); the architecture is open across four dimensions—computing power, interconnect (in-house HSL), security, and software stack—and the software stack side claims adaptation to over a hundred mainstream AI frameworks.
  • FlagOS-related records: Hygon dtk26.04 was the vendor line with the largest volume of build-infra records in the previous window (sglang 0.5.18 + vllm 0.20.2 dual-framework closed loop); in this window, the build-infra changelog baseline and FlagGems-Experimental’s Hygon-specific flash attention operator (1.3) both belong to its ecosystem advancement.

Interpretation: Hygon’s solution uses the “Token economy” as the narrative framework for its computing products, highly echoing the policy language in Beijing’s 15th Five-Year Plan on “building a token settlement system and creating token factories” (this issue’s 2.1)—that is, member organizations’ product narratives and local policy directions are already aligned at the same rhetorical level. For FlagOS, Hygon’s DCU backend saw both “dedicated flash attention operator merged” and “Token closed-loop solution released” in this issue, indicating that software stack operator completion and its commercial narrative are being advanced in tandem.

3.4 MetaX and Moore Threads: Lock-Up Expiration and Secondary Market Volatility (09-09)

Sources: East Money: MetaX 13.966 million restricted shares to be unlocked on September 17 (09-09), Sina Finance: Moore Threads stock price hits another record low (09-09)

  • MetaX announced that approximately 13.966 million restricted shares (3.4906% of total share capital) will become tradable starting September 17, a continuation of the previous unlock window.
  • Moore Threads’ stock price hit a new low since listing on September 9, with market value evaporating by approximately RMB 48.8 billion in a single day; multiple media outlets linked this to its unlock window. MetaX’s stock price also hit a five-and-a-half-month low during the same period.
  • At the sector level: on September 9, heavily weighted stocks in ETFs such as the STAR Composite Index, STAR AI, and STAR Chip generally declined, with Cambricon, Hygon Information, and MetaX all appearing among the declining constituents.

Interpretation: This item has no direct technical connection to the FlagOS software ecosystem and is recorded only as background per existing conventions, not included as a technical item. What is worth noting is merely the timing: Moore Threads’ stock price hit a new low since listing on the same day it announced the 100,000-card major order, indicating that there is a clear time lag between the capital market’s pricing logic for domestic GPUs and the landing of industry orders; for the community, such volatility does not affect the pace of advancement of build-infra delivery lines and FlagGems vendor backends (in this issue, the Moore Threads side still maintains 16 operators on the MThreads backend and two Megatron application image registrations).

IV. Summary

In this window (09-09 10:18 to 09-10 10:18), the GitHub side saw 135 in-window commits and 18 repo pushes, keeping engineering activity at a high level; on the news side, component-level retrieval marked its eighth consecutive quiet window, but a heavyweight item appeared on the policy side. Four main threads:

  1. At the policy level, FlagOS entered the text of Beijing’s five-year plan (the most important change this period): Beijing’s “15th Five-Year Plan” digital economy plan explicitly states “strengthen RISC-V intelligent computing instruction set innovation, deepen the construction of the Zhongzhi (FlagOS) open-source ecosystem, and lay out the Lingji (LinkeeOS) agent operating system,” placing FlagOS in the same policy sentence as the capacity to build 100,000-card clusters and the integration of Xinchuang software and hardware. This is the first time FlagOS has appeared in a Beijing five-year-plan-level document, and its role has risen from “an open-source project led by BAAI” to the system software stack carrier for the city-level autonomous and controllable computing infrastructure.
  2. build-infra completed Ascend 910C backend integration and landed a changelog baseline for 60 app images: 910C was integrated as a “homogeneous variant of the 910B line chip” (byte-level reuse of the Containerfile, with only the A3 ops token changed), and was deliberately kept out of the app build matrix by the absence of deps_app; the 60-image changelog + push gating upgraded delivery records to a “per-image change history + mandatory reason explanation.” The audit surface on the delivery side expanded in the same window as the chip matrix.
  3. The operator matrix maintained a high velocity, with vendor specialization continuing to shift right: 39 entries in the main repo (about 25 KernelGen Nvidia, KMCompiler Iluvatar/Ascend/Metax, QC XuanTie PPU quantized operators, GLU TLE auto-tuning), and 60 entries in the experimental repo (about 36 Iluvatar, about 16 MThreads, 3 Ascend, 2 Hygon); Hygon-specific _flash_attention_forward was merged, and DAMO XuanTie PPU fused persistent_topk (2,394 lines) was officially registered, representing two notable nodes. The CI side tightened in parallel (three-dot diff, rule-check-required, concurrency control).
  4. Member units advanced commercialization and ecosystem along two lines simultaneously: JD Cloud announced the construction of a 100,000-card full-function GPU cluster based on Moore Threads GPUs (the first time a domestic GPU has entered the core cluster of a leading cloud vendor, and it explicitly covers embodied intelligence); Enflame listed on the STAR Market on September 11 (planning to raise RMB 6 billion for fifth- and sixth-generation chips); Hygon released a Token operations “dual-chip” acceleration solution, in sync with Beijing’s “token factory” policy language. The pace of progress on the software side and the commercial side was clearly aligned in this window.

Forecast: Three points to watch going forward—first, when Ascend 910C will add deps_app and enter the app build matrix (this action will signal that 910C delivery is available); second, the release-info/community checklist actions around 2.2 GA (with the 09-24 test window deadline), and whether the FlagGems v5.4.0 rc series advances to an official release (the latest tag is still v5.4.0-rc1.post1); third, community-side supporting actions after the Beijing plan lands (how the “domestic advanced computing iterative validation platform” connects with the FlagOS validation matrix, and whether the weight of the RISC-V backend rises).

Appendix: Complete Source List

Source Verification Result
GitHub org repos API (flagos-ai, 52 repos) 18 repos pushed within window: FlagGems, build-infra, FlagCX, FlagGems-Experimental, FlagTree, FlagGems-vllm, FlagGems-sglang, FlagSparse, vllm-plugin-FL, FlagBLAS, FlagOS-Robo, libtriton_jit, FlagScale, FlagAttention, sglang-plugin-FL, docs, FlagTree-AscendNPU-IR, release-info; no new repos
GitHub commit search (org-wide 135 results, 5 pages, sort=committer-date) 14 repos with substantive merges to default branch, each verified individually for committer time and repo attribution: FlagGems-Experimental 60 / FlagGems 39 / build-infra 9 / FlagBLAS 8 / FlagTree 4 / FlagCX 2 / FlagGems-sglang 2 / vllm-plugin-FL 2 / FlagSparse 2 / FlagOS-Robo 2 / FlagAttention 2 / libtriton_jit 1 / FlagScale 1 / FlagGems-vllm 1
GitHub branches API + per-repo commits recheck sglang-plugin-FL (pushed 09-10 10:16 Beijing time), docs, FlagTree-AscendNPU-IR, release-info — four repos pushed within window, but no commits within window on default branch and no commits within window in branch lists; determined to be PR branch reference activity
GitHub commit details build-infra #803 (910C dual backend, 7 files), #801 (60 changelogs, 60 files), #799/#800 (mthreads Megatron app image tag); FlagGems-vllm #754 (thead fused persistent_topk, 2394 lines); FlagGems-Experimental #597/#598 (Hygon operators)
GitHub tags/releases API No new component releases in this window. Latest tags: FlagGems v5.4.0-rc1.post1, build-infra v2.1.1, FlagCX v0.14.0-rc1.post1, FlagTree v0.4.0, FlagGems-vllm v0.2.0-rc1.post1, vllm-plugin-FL v0.3.0-rc1.post1, FlagBLAS v0.3.0-rc1.post1, FlagOS-Robo v0.1.0
Google News RSS (20 query terms in Chinese and English, via proxy) Zero hits for component terms within window (eighth consecutive quiet window); “FlagOS when:1d” hit 1 Beijing municipal planning reprint (included as a policy item); member organization terms hit capital-market news such as listings/share lockup expirations/stock prices/fund flows, excluded from technical items per established criteria
HN Algolia (FlagOS/FlagGems/FlagScale/FlagTree/BAAI) All four component-term hits were irrelevant Show HN items from “flags/flagship” substring false matches; entire batch discarded
Tavily/web search Verification of original wording of Beijing’s “15th Five-Year Plan” digital economy plan (cross-verified across three sources: Securities Times/East Money/Cailian Press/Sina); JD Cloud 100,000-GPU cluster (Beijing News/Xinhua Finance/Nanfang Daily, three sources); Enflame listing announcement (Guandian/Financial World/Lieyun, three sources); Hygon Token business plan (Sina Finance)
FlagOS CSDN official account (flagos.csdn.net) No new articles; latest remains 08-28 GLM-5.3-Flash Day0 adaptation for 9 chips; 09-07 KubeCon forum and 09-03 operator competition replay remain pinned; KernelGen operator tuning topic page has no publication-time updates
BAAI Community (hub.baai.ac.cn) All 23 hits within window are routine content (AI + pharma, CV paper reading lists, AI dispute adjudication, AI Native R&D organization, etc.), not directly related to the FlagOS tech stack