The Value of TH1520 Continues to Grow: Software Ecosystem Expands, U-Boot Upstream Accepts Multiple Patches
Recently, the U-Boot next branch merged a new maintainer change patch, accepting Engineer Ziyao Jiang from Kubuds Technology as the U-Boot TH1520 maintainer [0]. This marks another small step forward in the construction of the open-source software ecosystem for TH1520.

According to the official project introduction of U-Boot [1], U-Boot, short for Universal Bootloader, is a bootloader that can run on most embedded systems. It supports multiple architectures including ARM, x86, and RISC-V, as well as more than 1,200 types of boards. It provides a feature-rich command-line interface, supports running scripts, reading/writing file systems, accessing networks, and can boot operating systems like Linux, Android, and ChromeOS. It is widely used in the RISC-V development board ecosystem.
TH1520 is the first mass-produced multi-modal AI vision RISC-V processor chip based on the WuJian 600 SoC platform. This chip is based on the XuanTie C910 core with a maximum frequency of up to 2.5GHz [2]. Common development boards include Sipeed’s LicheePi 4A and Milk-V’s Meles development board.
So far, the accepted contributions for TH1520 / LicheePi4A / Meles on U-Boot upstream are as follows:
- Preliminary support for the Lichee Pi 4A board Through chain loading the mainline U-Boot via the downstream U-Boot, the booting of U-Boot is initially realized.
- Support for eMMC and SD card controllers The controller driver used by TH1520 is ported to support reading and writing of eMMC and SD cards.
- Porting of U-Boot SPL (Secondary Program Loader) to TH1520: The mainline U-Boot can now load and run images directly via the USB port or onboard eMMC without relying on the downstream U-Boot.
- Initialization support for DDR controllers The mainline U-Boot supports initializing the DDR controller of TH1520 and conducting memory training, completing the initialization independently without relying on the downstream U-Boot.
- Support for the AP subsystem clock controller: Enables turning clock gates on/off, setting the parent clock selected by the clock multiplexer, and supports dynamically calculating clock frequencies without hardcoding frequencies in the source code.
Modification of the TH1520 boot process: In the downstream U-Boot and the previous mainline U-Boot, U-Boot ran in M-mode after being loaded by the SPL. However, most RISC-V system software, including UEFI applications, needs to run in S-mode. With this modification, the mainline TH1520 SPL will call OpenSBI after initialization and switch to S-mode, meeting the environmental requirements of more programs.
Among these, ziyao contributed to the SPL implementation, DDR controller initialization support, AP clock controller support, and modified the TH1520 boot process over the past two months. Their stable and continuous contributions gained community recognition, leading to becoming the TH1520 maintainer.
ziyao mentioned that RISC-V is a vibrant community without high walls and is very friendly to new developers. They hope more developers will join to experience the openness of the RISC-V community.
References:
[0]:MAINTAINERS: riscv: cpu: th1520: Assign myself as maintainer
[1]:https://www.u-boot.org/
[2]:https://www.xrvm.cn/document?temp=light&slug=cloudlab