Research window: Past 24 hours (2026-08-28 08:18 ~ 2026-08-29 08:18, Beijing time) Sources: HN, Google News aggregation, CNX Software, Phoronix, riscv.org blog, GitHub API (org/repo commit search), Futurum Group analyst notes, etc. (see appendix for details)

In This Issue

• I. Open-Source Community & Software Ecosystem
  • Espressif esp-nn 1.3.1 released, with vectorized optimization of the fully connected layer for RISC-V kernels (08-28)
• II. Product & Ecosystem Developments
  • SiFive BigSky enters delivery phase: first systems already running workloads at leading customers, Futurum analyst interpretation (08-28)
• III. Domestic Team Developments & Deep Dives
  • XiangShan: 68+ commits, large-scale merge of cross-month development work (ZICBO, Zvknha/Zvbb, vector unit refactor, AMOCAS) (08-28)
  • SpacemiT: new model library documentation tool repo model-zoo-file2md released 0.1.1 (08-28)
• IV. Embodied Intelligence & Robotics Special Section
  • No new RISC-V embodied intelligence products in the window; Hugging Face ecosystem’s Microduck bipedal robot released (RK3566/ARM, ecosystem reference) (08-28)
• V. Summary & Trend Observations
• Appendix: Complete Source List

I. Open-Source Community & Software Ecosystem

1.1 Espressif esp-nn 1.3.1 released, with vectorized optimization of the fully connected layer for RISC-V kernels

Date: 2026-08-28　Source: espressif/esp-nn commit history

Espressif’s neural network library esp-nn has released 1.3.1 (merged at 23:44 Beijing time on 08-28). The core performance improvement in this release is the vectorization of per-channel offset correction in the fully connected layer (fully_connected): the RISC-V path (riscv_pie optimized kernel variant, targeting the ESP32-C series) and the Xtensa S3 path were optimized in tandem, with the S3 side prioritizing assembly in short-row scenarios; the README performance figures were also refreshed. The riscv_pie kernel family in esp-nn covers activation functions, basic math, fully connected and other operators, and represents Espressif’s routine iteration in continuously providing DSP-level optimized operators for RISC-V MCUs, with no architectural-level changes.

II. Product & Ecosystem Developments

2.1 SiFive BigSky enters delivery phase: first systems already running workloads at leading customers, Futurum analyst interpretation

Date: 2026-08-28　Source: The Futurum Group analysis (published 2026-08-28)

Futurum Group analyst Brendan Burke published a BigSky special analysis on 08-28, with a headline stating outright that “SiFive BigSky ships the first RISC-V server.” Key new facts: (1) BigSky SF-2U870 fully conforms to the RVA23 profile, with out-of-the-box support for Ubuntu 26.04 LTS and RHEL 10; (2) CUDA can run on its P870-D cores, serving as the head node (control node) for NVIDIA GPU LLM workloads; (3) SiFive says leading customers (including hyperscale cloud providers, software vendors, and major SoC vendors) are already running workloads on deployed BigSky systems. The analyst’s judgment: BigSky is essentially a porting vehicle that “sells time” — compressing the multi-year software phase of hyperscalers’ custom SoC projects; RISC-V servers are currently at a position comparable to Arm around 2018 (RVA23 and server platform specifications finalized, enterprise-grade Linux ready, and the first silicon capable of running that software stack reaching customers), and the constraint on RISC-V data center adoption has shifted from silicon to software, with BigSky built precisely to close that gap on schedule. It also notes that SiFive did not publish SPEC/performance, power, and pricing data alongside the platform, leaving verification of commercial competitiveness for later. This window represents the “delivery/deployment progress + analyst framing” phase of the event, following its 08-24 release and media fermentation from 08-25 to 08-27, and constitutes substantive new information.

III. Domestic Team Updates and Deep Dive

3.1 XiangShan: 68+ Commits, Large-Scale Merge of Cross-Month Development Work (ZICBO, Zvknha/Zvbb, Vector Unit Refactor, AMOCAS)

Date: 2026-08-28　Source: OpenXiangShan/XiangShan commit search, XiangShanLab

The OpenXiangShan organization logged approximately 84 commits within the window (68 in the main XiangShan repo). The core event was a large-scale merge of cross-month development work at 16:44 on 08-28 (author dates spanning 2025-11 to 2026-08-26, representing the tail end of a batch merge rather than same-day development). Key points: (1) ZICBO extension: added ZICBO support and unified cache block operation (cbo) opcodes via LSUOpType (author 08-26); (2) Cryptographic vector extensions: Zvknha (NIST AES vector cryptography) initial version (author 2026-02), Zvbb (vector bit manipulation) initial support (author 2026-02); (3) Vector unit refactor: new initial vector commit (author 08-06), vstart passed into VectorDecodeChannel, immType added to vector fu config, vl value wakeup disabled, VTypeGen timing path broken, and a batch of other refactors and timing optimizations; (4) AMOCAS d/w/q support (author 08-19) and AMOCAS src select logic fixes; (5) On the ISA side, generated instruction lists imported from the riscv_opcodes repository (author 2025-11), differentiated load event opcodes (formLoadEventOpcode, author 08-20). XiangShanLab was also active during the same period: the No. 4636 analysis program landed, difftest-tracer skill, chisel teaching program base library, and issue workflow overhaul, with teaching and experimental tooling continuing to advance. This merge notably strengthens XiangShan’s vector extension coverage, atomic instruction, and cache block operation instruction support.

3.2 SpacemiT: New Model Library Documentation Tool Repo model-zoo-file2md Released 0.1.1

Date: 2026-08-28　Source: spacemit-com/model-zoo-file2md

SpacemiT logged 3 commits within the window (new repo model-zoo-file2md): added a document to markdown component (feat(file2md)), restored readable 0.1.1 release notes, and removed the local benchmark report script. The repo is positioned as a model library documentation-to-Markdown toolchain, serving documentation standardization for the SpacemiT model zoo series repos (model_zoo_rl, etc.). Combined with the previous day’s AVL documentation work in the docs-chip repo, SpacemiT is steadily strengthening the engineering consolidation of model library and hardware documentation. Activity volume was low for the day, reflecting toolchain refinement.

IV. Embodied Intelligence and Robotics Special Section

4.1 No New RISC-V Embodied Intelligence Products in the Window; Hugging Face Ecosystem Microduck Bipedal Robot Released (RK3566/ARM, Ecosystem Reference)

Date: 2026-08-28　Source: CNX Software, pollen-robotics/microduck

Pollen Robotics and Hugging Face released Microduck: a 25 cm tall bipedal robot with 15 motors (leg/head/neck degrees of freedom), camera + depth sensor + dual IMU + 8×8 ToF LiDAR, an articulated beak capable of grasping objects, priced at $399 for pre-order, shipping before Christmas 2026, limited to North America and Europe. Its main controller is a Rockchip RK3566 (quad-core Cortex-A55, not RISC-V), and the software stack (a 50 Hz servo control daemon written in Rust, Python reinforcement learning training tools, and a Hugging Face online simulator) is fully open source. There were no new RISC-V embodied intelligence hardware products in this window; this item is included as an ecosystem reference — the physical AI hardware wave (Hugging Face’s open-source robotics ecosystem) continues to accelerate, but ARM platforms remain the mainstream choice for end-device main controllers, and RISC-V penetration in embodied intelligence still presents a pattern of “standards and governance leading the way (MIPS promoted to top-tier membership, reported yesterday), with end-device deployment yet to be observed.”

V. Summary and Trend Observations

1. The core event in this window is SiFive BigSky moving from “launch” to “delivery”: Futurum analysts confirmed that the first systems are already deployed and running workloads at leading customers including hyperscale cloud providers, with full RVA23 compliance + Ubuntu 26.04 LTS/RHEL 10 ready out of the box, and CUDA taking on the role of NVIDIA GPU head node on the P870-D; the analysis benchmarks this against “RISC-V servers being where Arm was in 2018,” with software readiness having become the primary bottleneck for data center deployment. No performance or pricing data was disclosed, and commercial validation remains to be seen.
2. XiangShan completed a large-scale merge of cross-month development work: vector unit refactor + Zvknha/Zvbb cryptographic vector extensions + ZICBO cache block operation extension + AMOCAS atomic instruction support, significantly strengthening instruction coverage and security features; XiangShanLab teaching and experimental tooling (the 4636 program, difftest-tracer) advanced in parallel, with a steady pace of converting research into engineering.
3. Domestic team activity diverged: SpacemiT released the new documentation tool repo model-zoo-file2md 0.1.1; Sophgo, T-Head (XUANTIE-RV), Nuclei, and ESWIN had no commits within the window — Sophgo had just completed the official CV84X6 spec landing yesterday, so this is a normal cadence rotation.
4. Embodied intelligence: no new RISC-V hardware products in the window; the Hugging Face ecosystem’s Microduck bipedal robot chose the RK3566 (ARM), with ARM remaining dominant for physical AI end-device main controllers, and RISC-V’s deployment pace in this field lagging behind governance-layer signals.
5. Limitations note: gnews Chinese team queries (T-Head/XiangShan/Sophgo/SpacemiT/Nuclei/ESWIN) returned empty or noise (XiangShan hits were all news about the identically named Beijing Xiangshan Forum); the “Milk-V” query was severely polluted by gnews tokenization into milk-related content; StarFive hits were mislabeled as 301536.SZ (SigmaStar Technology, not StarFive) semi-annual reports; domestic team information is based on GitHub commits.

Appendix: Complete Source List

Supplementary Query Verification Table (window 24h, Beijing time 08-28 08:18 ~ 08-29 08:18)